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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id y11sm6633030pfi.80.2022.01.07.13.32.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Jan 2022 13:32:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 14/24] linux-user/mips: Improve do_break Date: Fri, 7 Jan 2022 13:32:33 -0800 Message-Id: <20220107213243.212806-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220107213243.212806-1-richard.henderson@linaro.org> References: <20220107213243.212806-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1030 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Rename to do_tr_or_bp, as per the kernel function. Add a 'trap' argument, akin to the kernel's si_code, but clearer. The return value is always 0, so change the return value to void. Use force_sig and force_sig_fault. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/mips/cpu_loop.c | 46 +++++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 20 deletions(-) diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 32f9fc1c1c..4fa24cc074 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -40,29 +40,25 @@ enum { BRK_DIVZERO = 7 }; -static int do_break(CPUMIPSState *env, target_siginfo_t *info, - unsigned int code) +static void do_tr_or_bp(CPUMIPSState *env, unsigned int code, bool trap) { - int ret = -1; + target_ulong pc = env->active_tc.PC; switch (code) { case BRK_OVERFLOW: + force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, pc); + break; case BRK_DIVZERO: - info->si_signo = TARGET_SIGFPE; - info->si_errno = 0; - info->si_code = (code == BRK_OVERFLOW) ? FPE_INTOVF : FPE_INTDIV; - queue_signal(env, info->si_signo, QEMU_SI_FAULT, &*info); - ret = 0; + force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, pc); break; default: - info->si_signo = TARGET_SIGTRAP; - info->si_errno = 0; - queue_signal(env, info->si_signo, QEMU_SI_FAULT, &*info); - ret = 0; + if (trap) { + force_sig(TARGET_SIGTRAP); + } else { + force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, pc); + } break; } - - return ret; } void cpu_loop(CPUMIPSState *env) @@ -205,6 +201,13 @@ done_syscall: abi_ulong trap_instr; unsigned int code; + /* + * FIXME: It would be better to decode the trap number + * during translate, and store it in error_code while + * raising the exception. We should not be re-reading + * the opcode here. + */ + if (env->hflags & MIPS_HFLAG_M16) { if (env->insn_flags & ASE_MICROMIPS) { /* microMIPS mode */ @@ -257,9 +260,7 @@ done_syscall: } } - if (do_break(env, &info, code) != 0) { - goto error; - } + do_tr_or_bp(env, code, false); } break; case EXCP_TRAP: @@ -267,6 +268,13 @@ done_syscall: abi_ulong trap_instr; unsigned int code = 0; + /* + * FIXME: It would be better to decode the trap number + * during translate, and store it in error_code while + * raising the exception. We should not be re-reading + * the opcode here. + */ + if (env->hflags & MIPS_HFLAG_M16) { /* microMIPS mode */ abi_ulong instr[2]; @@ -293,9 +301,7 @@ done_syscall: } } - if (do_break(env, &info, code) != 0) { - goto error; - } + do_tr_or_bp(env, code, true); } break; case EXCP_ATOMIC: