[PULL,02/33] docs: aspeed: Add new boards

Message ID	20211215104049.2030475-3-peter.maydell@linaro.org
State	Accepted
Commit	0b052414bdd4bc8d688a0eaf62f7a9ac417848a5
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL 02/33] docs: aspeed: Add new boards Date: Wed, 15 Dec 2021 10:40:18 +0000 Message-Id: <20211215104049.2030475-3-peter.maydell@linaro.org> In-Reply-To: <20211215104049.2030475-1-peter.maydell@linaro.org> References: <20211215104049.2030475-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	[PULL,01/33] hw/intc: clean-up error reporting for failed ITS cmd \| expand [PULL,01/33] hw/intc: clean-up error reporting for failed ITS cmd [PULL,02/33] docs: aspeed: Add new boards [PULL,03/33] docs: aspeed: Update OpenBMC image URL [PULL,04/33] docs: aspeed: Give an example of booting a kernel [PULL,05/33] docs: aspeed: ADC is now modelled [PULL,06/33] Fix STM32F2XX USART data register readout [PULL,07/33] hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.c [PULL,08/33] hw/intc/arm_gicv3: Introduce CONFIG_ARM_GIC_TCG Kconfig selector [PULL,09/33] target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn [PULL,10/33] target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn [PULL,11/33] target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insn [PULL,12/33] target/arm: Split arm_pre_translate_insn [PULL,13/33] target/arm: Advance pc for arch single-step exception [PULL,14/33] target/arm: Split compute_fsr_fsc out of arm_deliver_fault [PULL,15/33] target/arm: Take an exception if PC is misaligned [PULL,16/33] target/arm: Assert thumb pc is aligned [PULL,17/33] target/arm: Suppress bp for exceptions with more priority [PULL,18/33] tests/tcg: Add arm and aarch64 pc alignment tests [PULL,19/33] target/i386: Use assert() to sanity-check b1 in SSE decode [PULL,20/33] include/hw/i386: Don't include qemu-common.h in .h files [PULL,21/33] target/hexagon/cpu.h: don't include qemu-common.h [PULL,22/33] target/rx/cpu.h: Don't include qemu-common.h [PULL,23/33] hw/arm: Don't include qemu-common.h unnecessarily [PULL,24/33] target/arm: Correct calculation of tlb range invalidate length [PULL,25/33] hw/net: npcm7xx_emc fix missing queue_flush [PULL,26/33] hw/arm/virt-acpi-build: Add VIOT table for virtio-iommu [PULL,27/33] hw/arm/virt: Remove device tree restriction for virtio-iommu [PULL,28/33] hw/arm/virt: Reject instantiation of multiple IOMMUs [PULL,29/33] hw/arm/virt: Use object_property_set instead of qdev_prop_set [PULL,30/33] tests/acpi: allow updates of VIOT expected data files [PULL,31/33] tests/acpi: add test case for VIOT [PULL,32/33] tests/acpi: add expected blobs for VIOT test on q35 machine [PULL,33/33] tests/acpi: add expected blob for VIOT test on virt machine

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0b052414bdd4bc8d688a0eaf62f7a9ac417848a5

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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 02/33] docs: aspeed: Add new boards
Date: Wed, 15 Dec 2021 10:40:18 +0000
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Series

[PULL,01/33] hw/intc: clean-up error reporting for failed ITS cmd | expand

Commit Message

Peter Maydell Dec. 15, 2021, 10:40 a.m. UTC

From: Joel Stanley <joel@jms.id.au>

Add X11, FP5280G2, G220A, Rainier and Fuji. Mention that Swift will be
removed in v7.0.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20211117065752.330632-2-joel@jms.id.au
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 docs/system/arm/aspeed.rst | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index cec87e3743d..41a9bd5608e 100644
--- a/docs/system/arm/aspeed.rst
+++ b/docs/system/arm/aspeed.rst
@@ -14,6 +14,7 @@  AST2400 SoC based machines :
 
 - ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
 - ``quanta-q71l-bmc``      OpenBMC Quanta BMC
+- ``supermicrox11-bmc``    Supermicro X11 BMC
 
 AST2500 SoC based machines :
 
@@ -21,12 +22,16 @@  AST2500 SoC based machines :
 - ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
 - ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
 - ``sonorapass-bmc``       OCP SonoraPass BMC
-- ``swift-bmc``            OpenPOWER Swift BMC POWER9
+- ``swift-bmc``            OpenPOWER Swift BMC POWER9 (to be removed in v7.0)
+- ``fp5280g2-bmc``         Inspur FP5280G2 BMC
+- ``g220a-bmc``            Bytedance G220A BMC
 
 AST2600 SoC based machines :
 
 - ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex-A7)
 - ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
+- ``rainier-bmc``          IBM Rainier POWER10 BMC
+- ``fuji-bmc``             Facebook Fuji BMC
 
 Supported devices
 -----------------

[PULL,02/33] docs: aspeed: Add new boards

Commit Message

Patch