From patchwork Sat Dec 11 19:11:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 523077 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp4103163imb; Sat, 11 Dec 2021 11:24:32 -0800 (PST) X-Google-Smtp-Source: ABdhPJwPo+ESrD20Hk1eEXm1p/dC6mFVS/8E9PULU/DWDV0uy5Kefhh4hE7m9E+rmlwcPElZ3jH6 X-Received: by 2002:a05:622a:130c:: with SMTP id v12mr36101252qtk.456.1639250672220; Sat, 11 Dec 2021 11:24:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1639250672; cv=none; d=google.com; s=arc-20160816; b=xrd3pYyWDh7PhnKGBODKanJeuTbZxC35bBd9QJeNYKgNmdF2BtwvnEOsI5FkVJBEhf Sbk4Jg5NvMKMIKPeW/OlJv5m36YUgHiLlUIxW1TH/ilCuGjvmdRcLaa5rGn8auWFYAPs LHTFRNiOk2OTZmc5AcIAMau6dF82KXj9l3HpZGYneH8F5S95o4PdKLTuiBMzE1NmfvjM Ofwzc4YYW8FdM6r4/j/mgMrJmBYmg8BFVBsHWoTWMFfA8izUNG0/Q8C7DI0GZKuSTNR4 eQUzfq5Oy3Nz4kXXhkZoRJOiB+6FCGvgMZHkngeUku4rQVhdKKGW0ByoQR3Z6YvmeQ+7 SZGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=I3wAglRq0v7J28qeq3AcCdmuBqd8GqSly1K8jDYrRM4=; b=Z/inxndt7UmEabTIbRfjejM0soSLcN7rEsi5h9/GqVoHrni1x1x26MPgUGgvw5bTY2 Ng50ulO7byCuwoapFetUwwI3wcBG1pUKVLy1y+WT/CW43VgbRStP1CP2OFOCw1T4WbqB p7/w7axeLxvstHOuKWE3j59QuFUa1/hTs7hZZIsmr7Q7zejMkguSouEDf94lzABRYtfh ZEuRRqAVl44ipn91NiJTUrWl3EEvmGx5QW+II6PrDt3cCnoVPFPJhZK8yaOBwlyFo5b0 ZknLSywM9oSll1Euw+QhN+fnTzLxWoF9HrcxxFRtnZqAlzP/2TU1TlUQ0h4VCXXaF3yl bUKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=OBC8biFB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m4si7134725qkp.452.2021.12.11.11.24.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 11 Dec 2021 11:24:32 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=OBC8biFB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49942 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mw7yv-0005Qf-Se for patch@linaro.org; Sat, 11 Dec 2021 14:24:31 -0500 Received: from eggs.gnu.org ([209.51.188.92]:48276) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mw7mo-00050r-W2 for qemu-devel@nongnu.org; Sat, 11 Dec 2021 14:12:00 -0500 Received: from [2a00:1450:4864:20::332] (port=53138 helo=mail-wm1-x332.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mw7mi-0006Fo-4F for qemu-devel@nongnu.org; Sat, 11 Dec 2021 14:11:56 -0500 Received: by mail-wm1-x332.google.com with SMTP id o29so9202406wms.2 for ; Sat, 11 Dec 2021 11:11:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=I3wAglRq0v7J28qeq3AcCdmuBqd8GqSly1K8jDYrRM4=; b=OBC8biFBeuU/siCqS1vhHI4uu4XzgzQg3UVG/lR+TlCYPM3dCHp1duFU46iiJSWcD8 ucOjXIKtSwnqS1YAaIW0ogbTAz1gcu3lLbLviIdEY1JgYAgRgqvAKSkhAGBH8mOI/D7n cSnXIBawCds1F8TL+8tjyIsC+QCs8opIz1IppZcElySH3MQ/f5s+wIZxWJsx1AQk8a5C LFGFLr6LlTJTa8Zv0jYJWo0zRkhDG4aZm+JbelywUnqmftCDSkqRBkuHnwxcPXtI/pq+ VHL/IzTQ1WZstYPTPV+DLA5rM5vcRWH5vZc5cyRlOoyhdW/VrCCAB88v858IzJBN4gly isVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I3wAglRq0v7J28qeq3AcCdmuBqd8GqSly1K8jDYrRM4=; b=V/hSdi+vTd0OgfRfV50HkjMd+Y3hZVrfcOfjyuB988KLg69GCLBqz2Y0hmWB8GnVVT L83TEFbaOICQps6SOnys7vCs+IMzc1a1rAMu66oQbMn6kKywSoGbxl2qgx3phiUgiL9h Rcwk0k4006kCOQMDPUusLfqc+kMsz4RWmCTcMRHkq76d7BucntaAqJyPZkRdqTegPzXK XuZw51mglpHMbkJtupTOtXdGACQ5heMWRImWqmD+latxn/buj+IVeua28/OXEa10oOYG MKVb67Q2kitgSwn+D1nyJWUAdhGsespOBKsvYnonQ7XRbo0Rleihy64YCn/awQcwZoBF eMcw== X-Gm-Message-State: AOAM532me+mPtkX4Kq48ne84v24pxSDLuzz99by867IMJW6W6DvqzKzY op0fSKtC0K39vVPcqqLqYMDb2w== X-Received: by 2002:a7b:cc94:: with SMTP id p20mr25310546wma.162.1639249910150; Sat, 11 Dec 2021 11:11:50 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id m20sm2205300wmq.11.2021.12.11.11.11.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Dec 2021 11:11:49 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 16/26] hw/intc/arm_gicv3_its: Fix event ID bounds checks Date: Sat, 11 Dec 2021 19:11:25 +0000 Message-Id: <20211211191135.1764649-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211211191135.1764649-1-peter.maydell@linaro.org> References: <20211211191135.1764649-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::332 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Shashi Mallela , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" In process_its_cmd() and process_mapti() we must check the event ID against a limit defined by the size field in the DTE, which specifies the number of ID bits minus one. Convert this code to our num_foo convention, fixing the off-by-one error. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- hw/intc/arm_gicv3_its.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index e4105282b57..8561392fdbe 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -225,7 +225,7 @@ static bool process_its_cmd(GICv3ITSState *s, uint64_t value, uint32_t offset, MemTxResult res = MEMTX_OK; bool dte_valid; uint64_t dte = 0; - uint32_t max_eventid; + uint32_t num_eventids; uint16_t icid = 0; uint32_t pIntid = 0; bool ite_valid = false; @@ -258,7 +258,7 @@ static bool process_its_cmd(GICv3ITSState *s, uint64_t value, uint32_t offset, dte_valid = FIELD_EX64(dte, DTE, VALID); if (dte_valid) { - max_eventid = 1ULL << (FIELD_EX64(dte, DTE, SIZE) + 1); + num_eventids = 1ULL << (FIELD_EX64(dte, DTE, SIZE) + 1); ite_valid = get_ite(s, eventid, dte, &icid, &pIntid, &res); @@ -299,10 +299,10 @@ static bool process_its_cmd(GICv3ITSState *s, uint64_t value, uint32_t offset, dte_valid ? "valid" : "invalid", ite_valid ? "valid" : "invalid", cte_valid ? "valid" : "invalid"); - } else if (eventid > max_eventid) { + } else if (eventid >= num_eventids) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: eventid %d > %d\n", - __func__, eventid, max_eventid); + __func__, eventid, num_eventids); } else { /* * Current implementation only supports rdbase == procnum @@ -336,7 +336,7 @@ static bool process_mapti(GICv3ITSState *s, uint64_t value, uint32_t offset, AddressSpace *as = &s->gicv3->dma_as; uint32_t devid, eventid; uint32_t pIntid = 0; - uint32_t max_eventid, max_Intid; + uint32_t num_eventids, max_Intid; bool dte_valid; MemTxResult res = MEMTX_OK; uint16_t icid = 0; @@ -376,11 +376,11 @@ static bool process_mapti(GICv3ITSState *s, uint64_t value, uint32_t offset, return result; } dte_valid = FIELD_EX64(dte, DTE, VALID); - max_eventid = 1ULL << (FIELD_EX64(dte, DTE, SIZE) + 1); + num_eventids = 1ULL << (FIELD_EX64(dte, DTE, SIZE) + 1); max_Intid = (1ULL << (GICD_TYPER_IDBITS + 1)) - 1; if ((devid >= s->dt.num_ids) || (icid >= s->ct.num_ids) - || !dte_valid || (eventid > max_eventid) || + || !dte_valid || (eventid >= num_eventids) || (((pIntid < GICV3_LPI_INTID_START) || (pIntid > max_Intid)) && (pIntid != INTID_SPURIOUS))) { qemu_log_mask(LOG_GUEST_ERROR,