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[37.158.79.165]) by smtp.gmail.com with ESMTPSA id q84sm14044877wme.3.2021.11.19.08.05.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Nov 2021 08:05:21 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 06/35] softfloat: Add flag specific to convert non-nan to int Date: Fri, 19 Nov 2021 17:04:33 +0100 Message-Id: <20211119160502.17432-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211119160502.17432-1-richard.henderson@linaro.org> References: <20211119160502.17432-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::42b (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com, alex.bennee@linaro.org, clg@kaod.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" PowerPC has this flag, and it's easier to compute it here than after the fact. Signed-off-by: Richard Henderson --- include/fpu/softfloat-types.h | 1 + fpu/softfloat-parts.c.inc | 14 +++++++------- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 33224b5f22..9ca50e930b 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -157,6 +157,7 @@ enum { float_flag_invalid_idi = 0x0200, /* inf / inf */ float_flag_invalid_zdz = 0x0400, /* 0 / 0 */ float_flag_invalid_sqrt = 0x0800, /* sqrt(-x) */ + float_flag_invalid_cvti = 0x1000, /* non-nan to integer */ }; /* diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc index cc8c2c3aee..ce580347dd 100644 --- a/fpu/softfloat-parts.c.inc +++ b/fpu/softfloat-parts.c.inc @@ -1055,7 +1055,7 @@ static int64_t partsN(float_to_sint)(FloatPartsN *p, FloatRoundMode rmode, break; case float_class_inf: - flags = float_flag_invalid; + flags = float_flag_invalid | float_flag_invalid_cvti; r = p->sign ? min : max; break; @@ -1077,11 +1077,11 @@ static int64_t partsN(float_to_sint)(FloatPartsN *p, FloatRoundMode rmode, if (r <= -(uint64_t)min) { r = -r; } else { - flags = float_flag_invalid; + flags = float_flag_invalid | float_flag_invalid_cvti; r = min; } } else if (r > max) { - flags = float_flag_invalid; + flags = float_flag_invalid | float_flag_invalid_cvti; r = max; } break; @@ -1120,7 +1120,7 @@ static uint64_t partsN(float_to_uint)(FloatPartsN *p, FloatRoundMode rmode, break; case float_class_inf: - flags = float_flag_invalid; + flags = float_flag_invalid | float_flag_invalid_cvti; r = p->sign ? 0 : max; break; @@ -1138,15 +1138,15 @@ static uint64_t partsN(float_to_uint)(FloatPartsN *p, FloatRoundMode rmode, } if (p->sign) { - flags = float_flag_invalid; + flags = float_flag_invalid | float_flag_invalid_cvti; r = 0; } else if (p->exp > DECOMPOSED_BINARY_POINT) { - flags = float_flag_invalid; + flags = float_flag_invalid | float_flag_invalid_cvti; r = max; } else { r = p->frac_hi >> (DECOMPOSED_BINARY_POINT - p->exp); if (r > max) { - flags = float_flag_invalid; + flags = float_flag_invalid | float_flag_invalid_cvti; r = max; } }