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[PULL,v2,07/12] target/arm: Introduce store_cpu_field_constant() helper

Message ID 20211102182519.320319-8-richard.henderson@linaro.org
State Accepted
Commit daf7a1814feec8a52481a695c2b9f0b9c71f0d46
Headers show
Series target/arm patch queue | expand

Commit Message

Richard Henderson Nov. 2, 2021, 6:25 p.m. UTC 
From: Philippe Mathieu-Daudé <f4bug@amsat.org>


Similarly to the store_cpu_field() helper which takes a TCG
temporary, store its value to the CPUState, introduce the
store_cpu_field_constant() helper which store a constant to
CPUState (without using any TCG temporary).

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Message-Id: <20211029231834.2476117-3-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/translate-a32.h | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.25.1
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Patch

diff --git a/target/arm/translate-a32.h b/target/arm/translate-a32.h
index 88f15df60e..17af8dc95a 100644
--- a/target/arm/translate-a32.h
+++ b/target/arm/translate-a32.h
@@ -70,6 +70,9 @@  static inline void store_cpu_offset(TCGv_i32 var, int offset)
 #define store_cpu_field(var, name) \
     store_cpu_offset(var, offsetof(CPUARMState, name))
 
+#define store_cpu_field_constant(val, name) \
+    tcg_gen_st_i32(tcg_constant_i32(val), cpu_env, offsetof(CPUARMState, name))
+
 /* Create a new temporary and set it to the value of a CPU register.  */
 static inline TCGv_i32 load_reg(DisasContext *s, int reg)
 {