From patchwork Tue Nov 2 10:59:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516618 Delivered-To: patch@linaro.org Received: by 2002:ad5:5208:0:0:0:0:0 with SMTP id p8csp4388720iml; Tue, 2 Nov 2021 04:05:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxuYn9K5lEASQyau8MCJdT2mKw7Uqm3BtoTe4/hnAy4FarW5qA/nB7kptLM5T7wMvgp757x X-Received: by 2002:aca:606:: with SMTP id 6mr4474041oig.82.1635851141934; Tue, 02 Nov 2021 04:05:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1635851141; cv=none; d=google.com; s=arc-20160816; b=is3Yz9HlV7O4oNqyraxcVKyNTcL42gyIbRKnIG8Mqso+K7Zs2PIpdTETgbk3HtmhXZ npf8pwkGI3CTAqot2p6PfH62WHaSMCouf0sBFyhX1vmFl5xSbGkQza7OJyOOXed+BMnr MymixdO/fUfZXBL0YdyVbjnluh7WfSXJgIIxVWjDiRPhw3QqCXY0Zm/nBTAI4PQ8hgV0 8+tltCweEeNyMJGxK+Dm1+G5bPQooJ2fRlSXZipjmBS2M0wt2xwRXzvAvIsBpYn1zyyJ 2tV3LVBdT1Pm7TB9SwcI8TFghjiKr8k8WRNLJaPEIaw8Y4IlZO6b1QBMR0hLreGD1fOJ mUIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=4iN+wCNn39PyCmqyIu9fXyF1t2chc7mKLTiK8TWZaXs=; b=ddM1FygakYYDfo/n/FGGJZ2G+zR7Z2uRpEtjvKgVijT/ZMtud/WYBEssYswTRV8XzO Vo88DJIAoAeMYfguZ+fy3gZXRVLq8fK5XC4+rj+yTGMI9/va9a2BOPI5TyoSgY9d3NdD xjYIjRpSBz8X7YdKOQafyBwrvHu1fGWkLdiBpZhF58FOiWHL46MDcqnJwRIA912VtSpr y/qzKlotS2xc05efik2DNAZkkPtfc4Q74EWYOuxW3TBFEUHKzSyAfVA8kNWr1qgt8vab kzxdaAGwe8NztWJEpJu6Jtw5fDH7W20/hHAZuEOaWTymU+5RvNmJQUpUU+5ZmxibXOnd lqXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rmrgg8GU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t7si15677728oiw.84.2021.11.02.04.05.41 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 Nov 2021 04:05:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rmrgg8GU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:35604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhrbp-0004y0-8O for patch@linaro.org; Tue, 02 Nov 2021 07:05:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40932) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhrW4-0007VU-2n for qemu-devel@nongnu.org; Tue, 02 Nov 2021 06:59:44 -0400 Received: from mail-qt1-x833.google.com ([2607:f8b0:4864:20::833]:33450) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mhrW2-0006rQ-3l for qemu-devel@nongnu.org; Tue, 02 Nov 2021 06:59:43 -0400 Received: by mail-qt1-x833.google.com with SMTP id h16so14018333qtk.0 for ; Tue, 02 Nov 2021 03:59:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4iN+wCNn39PyCmqyIu9fXyF1t2chc7mKLTiK8TWZaXs=; b=Rmrgg8GUf+8rtUpNAlHRceo2G4oWGcF6zrWd1cN/UVsWM8cV+/EkczEfKxoO98q4/7 mqCQTvW9oLMdY18Rk+P2iuf2a16OSpj7TqE4puOl4zxX7kVEKuWq/pZgwXOUbUREHZT/ ve2TqIk7+0u+kCw2S/prmqtMX+uyeVQQS1I9rzLTNVjm089wLmd/G8njAbBbW5s7rmrg hjUbPMXsJDshCW1wCbPiaoIg53RUjyLD9bbP1FqgbwrR4rOm9nyYuQfRRllRXoMmn1XB 2j9cnW7yIcAf0SOzKm0gNGRBmGLpAjg1qU3toaHukL/fmFD6YkfBq6I+187PwHWqz+QZ UWVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4iN+wCNn39PyCmqyIu9fXyF1t2chc7mKLTiK8TWZaXs=; b=JX75X5WPZoR9EYCIc8gOefZjd8KaObGuObQJ0VDKVXJp+XbvLVqe3JrMyC5KX27ksC s7N86uRdJQWB/jF0j9Mq53XnblmyCMEf60bB4mHd8zfgeV4jfD/YQhJwlrnInMtLnmPu e8tUjdXIQsAZkaIM7mcJA63iyqewbNkldFsNvuZy0OnMy7AsCqsd/EBHLFLOPe7t5DqV 1hf0oHtz1QQDVV2EcinDODIuMjTtIEjlkuOYgskvfaqfqWBqRLK9zxDECtd/EtuNmaBE ghRfvcBO01oKX4Rx5sl52yENbrBNeKCPHn8+FE0sgRUkqS4Wk0L9xPPlr7qh64/wsTlX KsBw== X-Gm-Message-State: AOAM530R2IXmgDGsj3kNs/Wf9E1QdIx0r2l8zCr4oI+KHfPgkEY+o3zF X0XNzf68Fgpq3qnMafCPovQm85RPaye2Ww== X-Received: by 2002:ac8:5c08:: with SMTP id i8mr37226021qti.181.1635850780141; Tue, 02 Nov 2021 03:59:40 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-57.nyc.biz.rr.com. [172.254.253.57]) by smtp.gmail.com with ESMTPSA id z26sm11789510qko.13.2021.11.02.03.59.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Nov 2021 03:59:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 06/12] target/arm: Advertise MVE to gdb when present Date: Tue, 2 Nov 2021 06:59:28 -0400 Message-Id: <20211102105934.214596-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211102105934.214596-1-richard.henderson@linaro.org> References: <20211102105934.214596-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::833; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x833.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?b?YXVkw6k=?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Cortex-M CPUs with MVE should advertise this fact to gdb, using the org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR register. Presence of this feature also tells gdb to create pseudo-registers Q0..Q7, so we do not need to tell gdb about them separately. Note that unless you have a very recent GDB that includes this fix: http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the individual fields of the VPR register as zero (but showing the whole thing as hex, eg with "print /x $vpr" will give the correct value). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org> Signed-off-by: Richard Henderson --- configs/targets/aarch64-softmmu.mak | 2 +- configs/targets/arm-linux-user.mak | 2 +- configs/targets/arm-softmmu.mak | 2 +- configs/targets/armeb-linux-user.mak | 2 +- target/arm/gdbstub.c | 25 +++++++++++++++++++++++++ gdb-xml/arm-m-profile-mve.xml | 19 +++++++++++++++++++ 6 files changed, 48 insertions(+), 4 deletions(-) create mode 100644 gdb-xml/arm-m-profile-mve.xml -- 2.25.1 diff --git a/configs/targets/aarch64-softmmu.mak b/configs/targets/aarch64-softmmu.mak index 13d40b55e6..d489e6da83 100644 --- a/configs/targets/aarch64-softmmu.mak +++ b/configs/targets/aarch64-softmmu.mak @@ -1,5 +1,5 @@ TARGET_ARCH=aarch64 TARGET_BASE_ARCH=arm TARGET_SUPPORTS_MTTCG=y -TARGET_XML_FILES= gdb-xml/aarch64-core.xml gdb-xml/aarch64-fpu.xml gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml +TARGET_XML_FILES= gdb-xml/aarch64-core.xml gdb-xml/aarch64-fpu.xml gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml TARGET_NEED_FDT=y diff --git a/configs/targets/arm-linux-user.mak b/configs/targets/arm-linux-user.mak index acecc339e3..3e10d6b15d 100644 --- a/configs/targets/arm-linux-user.mak +++ b/configs/targets/arm-linux-user.mak @@ -1,6 +1,6 @@ TARGET_ARCH=arm TARGET_SYSTBL_ABI=common,oabi TARGET_SYSTBL=syscall.tbl -TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml +TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml TARGET_HAS_BFLT=y CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y diff --git a/configs/targets/arm-softmmu.mak b/configs/targets/arm-softmmu.mak index f6c95ba07a..92c8349b96 100644 --- a/configs/targets/arm-softmmu.mak +++ b/configs/targets/arm-softmmu.mak @@ -1,4 +1,4 @@ TARGET_ARCH=arm TARGET_SUPPORTS_MTTCG=y -TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml +TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml TARGET_NEED_FDT=y diff --git a/configs/targets/armeb-linux-user.mak b/configs/targets/armeb-linux-user.mak index 662c73d8fb..f81e5bf1fe 100644 --- a/configs/targets/armeb-linux-user.mak +++ b/configs/targets/armeb-linux-user.mak @@ -2,6 +2,6 @@ TARGET_ARCH=arm TARGET_SYSTBL_ABI=common,oabi TARGET_SYSTBL=syscall.tbl TARGET_WORDS_BIGENDIAN=y -TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml +TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml TARGET_HAS_BFLT=y CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index e0dcb33e32..134da0d0ae 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -199,6 +199,27 @@ static int vfp_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg) return 0; } +static int mve_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg) +{ + switch (reg) { + case 0: + return gdb_get_reg32(buf, env->v7m.vpr); + default: + return 0; + } +} + +static int mve_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg) +{ + switch (reg) { + case 0: + env->v7m.vpr = ldl_p(buf); + return 4; + default: + return 0; + } +} + /** * arm_get/set_gdb_*: get/set a gdb register * @env: the CPU state @@ -468,6 +489,10 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) 2, "arm-vfp-sysregs.xml", 0); } } + if (cpu_isar_feature(aa32_mve, cpu)) { + gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg, + 1, "arm-m-profile-mve.xml", 0); + } gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg, arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs), "system-registers.xml", 0); diff --git a/gdb-xml/arm-m-profile-mve.xml b/gdb-xml/arm-m-profile-mve.xml new file mode 100644 index 0000000000..cba664c4c5 --- /dev/null +++ b/gdb-xml/arm-m-profile-mve.xml @@ -0,0 +1,19 @@ + + + + + + + + + + + + + + +