diff mbox series

[v5,05/67] configure: Merge riscv32 and riscv64 host architectures

Message ID 20211015041053.2769193-6-richard.henderson@linaro.org
State Superseded
Headers show
Series user-only: Cleanup SIGSEGV and SIGBUS handling | expand

Commit Message

Richard Henderson Oct. 15, 2021, 4:09 a.m. UTC
The existing code for safe-syscall.inc.S will compile
without change for riscv32 and riscv64.  We may also
drop the meson.build stanza that merges them for tcg/.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 configure                                             |  8 ++------
 meson.build                                           |  4 +---
 linux-user/host/{riscv64 => riscv}/hostdep.h          |  4 ++--
 linux-user/host/riscv32/hostdep.h                     | 11 -----------
 linux-user/host/{riscv64 => riscv}/safe-syscall.inc.S |  0
 5 files changed, 5 insertions(+), 22 deletions(-)
 rename linux-user/host/{riscv64 => riscv}/hostdep.h (94%)
 delete mode 100644 linux-user/host/riscv32/hostdep.h
 rename linux-user/host/{riscv64 => riscv}/safe-syscall.inc.S (100%)

-- 
2.25.1

Comments

Warner Losh Oct. 15, 2021, 6:21 p.m. UTC | #1
On Thu, Oct 14, 2021 at 10:10 PM Richard Henderson <
richard.henderson@linaro.org> wrote:

> The existing code for safe-syscall.inc.S will compile

> without change for riscv32 and riscv64.  We may also

> drop the meson.build stanza that merges them for tcg/.

>

> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  configure                                             |  8 ++------

>  meson.build                                           |  4 +---

>  linux-user/host/{riscv64 => riscv}/hostdep.h          |  4 ++--

>  linux-user/host/riscv32/hostdep.h                     | 11 -----------

>  linux-user/host/{riscv64 => riscv}/safe-syscall.inc.S |  0

>  5 files changed, 5 insertions(+), 22 deletions(-)

>  rename linux-user/host/{riscv64 => riscv}/hostdep.h (94%)

>  delete mode 100644 linux-user/host/riscv32/hostdep.h

>  rename linux-user/host/{riscv64 => riscv}/safe-syscall.inc.S (100%)

>


Reviewed-by: Warner Losh <imp@bsdimp.com>



> diff --git a/configure b/configure

> index 039467c04b..d57ad58342 100755

> --- a/configure

> +++ b/configure

> @@ -570,11 +570,7 @@ elif check_define __s390__ ; then

>      cpu="s390"

>    fi

>  elif check_define __riscv ; then

> -  if check_define _LP64 ; then

> -    cpu="riscv64"

> -  else

> -    cpu="riscv32"

> -  fi

> +  cpu="riscv"

>  elif check_define __arm__ ; then

>    cpu="arm"

>  elif check_define __aarch64__ ; then

> @@ -587,7 +583,7 @@ ARCH=

>  # Normalise host CPU name and set ARCH.

>  # Note that this case should only have supported host CPUs, not guests.

>  case "$cpu" in

> -  ppc|ppc64|s390x|sparc64|x32|riscv32|riscv64)

> +  ppc|ppc64|s390x|sparc64|x32|riscv)

>    ;;

>    ppc64le)

>      ARCH="ppc64"

> diff --git a/meson.build b/meson.build

> index 6b7487b725..1a8fc2c4e0 100644

> --- a/meson.build

> +++ b/meson.build

> @@ -52,7 +52,7 @@ have_block = have_system or have_tools

>  python = import('python').find_installation()

>

>  supported_oses = ['windows', 'freebsd', 'netbsd', 'openbsd', 'darwin',

> 'sunos', 'linux']

> -supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv32', 'riscv64', 'x86',

> 'x86_64',

> +supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv', 'x86', 'x86_64',

>    'arm', 'aarch64', 'mips', 'mips64', 'sparc', 'sparc64']

>

>  cpu = host_machine.cpu_family()

> @@ -342,8 +342,6 @@ if not get_option('tcg').disabled()

>      tcg_arch = 'i386'

>    elif config_host['ARCH'] == 'ppc64'

>      tcg_arch = 'ppc'

> -  elif config_host['ARCH'] in ['riscv32', 'riscv64']

> -    tcg_arch = 'riscv'

>    endif

>    add_project_arguments('-iquote', meson.current_source_dir() / 'tcg' /

> tcg_arch,

>                          language: ['c', 'cpp', 'objc'])

> diff --git a/linux-user/host/riscv64/hostdep.h

> b/linux-user/host/riscv/hostdep.h

> similarity index 94%

> rename from linux-user/host/riscv64/hostdep.h

> rename to linux-user/host/riscv/hostdep.h

> index 865f0fb9ff..2ba07456ae 100644

> --- a/linux-user/host/riscv64/hostdep.h

> +++ b/linux-user/host/riscv/hostdep.h

> @@ -5,8 +5,8 @@

>   * See the COPYING file in the top-level directory.

>   */

>

> -#ifndef RISCV64_HOSTDEP_H

> -#define RISCV64_HOSTDEP_H

> +#ifndef RISCV_HOSTDEP_H

> +#define RISCV_HOSTDEP_H

>

>  /* We have a safe-syscall.inc.S */

>  #define HAVE_SAFE_SYSCALL

> diff --git a/linux-user/host/riscv32/hostdep.h

> b/linux-user/host/riscv32/hostdep.h

> deleted file mode 100644

> index adf9edbf2d..0000000000

> --- a/linux-user/host/riscv32/hostdep.h

> +++ /dev/null

> @@ -1,11 +0,0 @@

> -/*

> - * hostdep.h : things which are dependent on the host architecture

> - *

> - * This work is licensed under the terms of the GNU GPL, version 2 or

> later.

> - * See the COPYING file in the top-level directory.

> - */

> -

> -#ifndef RISCV32_HOSTDEP_H

> -#define RISCV32_HOSTDEP_H

> -

> -#endif

> diff --git a/linux-user/host/riscv64/safe-syscall.inc.S

> b/linux-user/host/riscv/safe-syscall.inc.S

> similarity index 100%

> rename from linux-user/host/riscv64/safe-syscall.inc.S

> rename to linux-user/host/riscv/safe-syscall.inc.S

> --

> 2.25.1

>

>
<div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Oct 14, 2021 at 10:10 PM Richard Henderson &lt;<a href="mailto:richard.henderson@linaro.org">richard.henderson@linaro.org</a>&gt; wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">The existing code for safe-syscall.inc.S will compile<br>
without change for riscv32 and riscv64.  We may also<br>
drop the meson.build stanza that merges them for tcg/.<br>
<br>
Reviewed-by: Philippe Mathieu-Daudé &lt;<a href="mailto:f4bug@amsat.org" target="_blank">f4bug@amsat.org</a>&gt;<br>

Reviewed-by: Alistair Francis &lt;<a href="mailto:alistair.francis@wdc.com" target="_blank">alistair.francis@wdc.com</a>&gt;<br>

Signed-off-by: Richard Henderson &lt;<a href="mailto:richard.henderson@linaro.org" target="_blank">richard.henderson@linaro.org</a>&gt;<br>

---<br>
 configure                                             |  8 ++------<br>
 meson.build                                           |  4 +---<br>
 linux-user/host/{riscv64 =&gt; riscv}/hostdep.h          |  4 ++--<br>
 linux-user/host/riscv32/hostdep.h                     | 11 -----------<br>
 linux-user/host/{riscv64 =&gt; riscv}/safe-syscall.inc.S |  0<br>
 5 files changed, 5 insertions(+), 22 deletions(-)<br>
 rename linux-user/host/{riscv64 =&gt; riscv}/hostdep.h (94%)<br>
 delete mode 100644 linux-user/host/riscv32/hostdep.h<br>
 rename linux-user/host/{riscv64 =&gt; riscv}/safe-syscall.inc.S (100%)<br></blockquote><div><br></div><div><div>Reviewed-by: Warner Losh &lt;<a href="mailto:imp@bsdimp.com">imp@bsdimp.com</a>&gt;</div></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
diff --git a/configure b/configure<br>
index 039467c04b..d57ad58342 100755<br>
--- a/configure<br>
+++ b/configure<br>
@@ -570,11 +570,7 @@ elif check_define __s390__ ; then<br>
     cpu=&quot;s390&quot;<br>
   fi<br>
 elif check_define __riscv ; then<br>
-  if check_define _LP64 ; then<br>
-    cpu=&quot;riscv64&quot;<br>
-  else<br>
-    cpu=&quot;riscv32&quot;<br>
-  fi<br>
+  cpu=&quot;riscv&quot;<br>
 elif check_define __arm__ ; then<br>
   cpu=&quot;arm&quot;<br>
 elif check_define __aarch64__ ; then<br>
@@ -587,7 +583,7 @@ ARCH=<br>
 # Normalise host CPU name and set ARCH.<br>
 # Note that this case should only have supported host CPUs, not guests.<br>
 case &quot;$cpu&quot; in<br>
-  ppc|ppc64|s390x|sparc64|x32|riscv32|riscv64)<br>
+  ppc|ppc64|s390x|sparc64|x32|riscv)<br>
   ;;<br>
   ppc64le)<br>
     ARCH=&quot;ppc64&quot;<br>
diff --git a/meson.build b/meson.build<br>
index 6b7487b725..1a8fc2c4e0 100644<br>
--- a/meson.build<br>
+++ b/meson.build<br>
@@ -52,7 +52,7 @@ have_block = have_system or have_tools<br>
 python = import(&#39;python&#39;).find_installation()<br>
<br>
 supported_oses = [&#39;windows&#39;, &#39;freebsd&#39;, &#39;netbsd&#39;, &#39;openbsd&#39;, &#39;darwin&#39;, &#39;sunos&#39;, &#39;linux&#39;]<br>
-supported_cpus = [&#39;ppc&#39;, &#39;ppc64&#39;, &#39;s390x&#39;, &#39;riscv32&#39;, &#39;riscv64&#39;, &#39;x86&#39;, &#39;x86_64&#39;,<br>
+supported_cpus = [&#39;ppc&#39;, &#39;ppc64&#39;, &#39;s390x&#39;, &#39;riscv&#39;, &#39;x86&#39;, &#39;x86_64&#39;,<br>
   &#39;arm&#39;, &#39;aarch64&#39;, &#39;mips&#39;, &#39;mips64&#39;, &#39;sparc&#39;, &#39;sparc64&#39;]<br>
<br>
 cpu = host_machine.cpu_family()<br>
@@ -342,8 +342,6 @@ if not get_option(&#39;tcg&#39;).disabled()<br>
     tcg_arch = &#39;i386&#39;<br>
   elif config_host[&#39;ARCH&#39;] == &#39;ppc64&#39;<br>
     tcg_arch = &#39;ppc&#39;<br>
-  elif config_host[&#39;ARCH&#39;] in [&#39;riscv32&#39;, &#39;riscv64&#39;]<br>
-    tcg_arch = &#39;riscv&#39;<br>
   endif<br>
   add_project_arguments(&#39;-iquote&#39;, meson.current_source_dir() / &#39;tcg&#39; / tcg_arch,<br>
                         language: [&#39;c&#39;, &#39;cpp&#39;, &#39;objc&#39;])<br>
diff --git a/linux-user/host/riscv64/hostdep.h b/linux-user/host/riscv/hostdep.h<br>
similarity index 94%<br>
rename from linux-user/host/riscv64/hostdep.h<br>
rename to linux-user/host/riscv/hostdep.h<br>
index 865f0fb9ff..2ba07456ae 100644<br>
--- a/linux-user/host/riscv64/hostdep.h<br>
+++ b/linux-user/host/riscv/hostdep.h<br>
@@ -5,8 +5,8 @@<br>
  * See the COPYING file in the top-level directory.<br>
  */<br>
<br>
-#ifndef RISCV64_HOSTDEP_H<br>
-#define RISCV64_HOSTDEP_H<br>
+#ifndef RISCV_HOSTDEP_H<br>
+#define RISCV_HOSTDEP_H<br>
<br>
 /* We have a safe-syscall.inc.S */<br>
 #define HAVE_SAFE_SYSCALL<br>
diff --git a/linux-user/host/riscv32/hostdep.h b/linux-user/host/riscv32/hostdep.h<br>
deleted file mode 100644<br>
index adf9edbf2d..0000000000<br>
--- a/linux-user/host/riscv32/hostdep.h<br>
+++ /dev/null<br>
@@ -1,11 +0,0 @@<br>
-/*<br>
- * hostdep.h : things which are dependent on the host architecture<br>
- *<br>
- * This work is licensed under the terms of the GNU GPL, version 2 or later.<br>
- * See the COPYING file in the top-level directory.<br>
- */<br>
-<br>
-#ifndef RISCV32_HOSTDEP_H<br>
-#define RISCV32_HOSTDEP_H<br>
-<br>
-#endif<br>
diff --git a/linux-user/host/riscv64/safe-syscall.inc.S b/linux-user/host/riscv/safe-syscall.inc.S<br>
similarity index 100%<br>
rename from linux-user/host/riscv64/safe-syscall.inc.S<br>
rename to linux-user/host/riscv/safe-syscall.inc.S<br>
-- <br>
2.25.1<br>
<br>
</blockquote></div></div>
diff mbox series

Patch

diff --git a/configure b/configure
index 039467c04b..d57ad58342 100755
--- a/configure
+++ b/configure
@@ -570,11 +570,7 @@  elif check_define __s390__ ; then
     cpu="s390"
   fi
 elif check_define __riscv ; then
-  if check_define _LP64 ; then
-    cpu="riscv64"
-  else
-    cpu="riscv32"
-  fi
+  cpu="riscv"
 elif check_define __arm__ ; then
   cpu="arm"
 elif check_define __aarch64__ ; then
@@ -587,7 +583,7 @@  ARCH=
 # Normalise host CPU name and set ARCH.
 # Note that this case should only have supported host CPUs, not guests.
 case "$cpu" in
-  ppc|ppc64|s390x|sparc64|x32|riscv32|riscv64)
+  ppc|ppc64|s390x|sparc64|x32|riscv)
   ;;
   ppc64le)
     ARCH="ppc64"
diff --git a/meson.build b/meson.build
index 6b7487b725..1a8fc2c4e0 100644
--- a/meson.build
+++ b/meson.build
@@ -52,7 +52,7 @@  have_block = have_system or have_tools
 python = import('python').find_installation()
 
 supported_oses = ['windows', 'freebsd', 'netbsd', 'openbsd', 'darwin', 'sunos', 'linux']
-supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv32', 'riscv64', 'x86', 'x86_64',
+supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv', 'x86', 'x86_64',
   'arm', 'aarch64', 'mips', 'mips64', 'sparc', 'sparc64']
 
 cpu = host_machine.cpu_family()
@@ -342,8 +342,6 @@  if not get_option('tcg').disabled()
     tcg_arch = 'i386'
   elif config_host['ARCH'] == 'ppc64'
     tcg_arch = 'ppc'
-  elif config_host['ARCH'] in ['riscv32', 'riscv64']
-    tcg_arch = 'riscv'
   endif
   add_project_arguments('-iquote', meson.current_source_dir() / 'tcg' / tcg_arch,
                         language: ['c', 'cpp', 'objc'])
diff --git a/linux-user/host/riscv64/hostdep.h b/linux-user/host/riscv/hostdep.h
similarity index 94%
rename from linux-user/host/riscv64/hostdep.h
rename to linux-user/host/riscv/hostdep.h
index 865f0fb9ff..2ba07456ae 100644
--- a/linux-user/host/riscv64/hostdep.h
+++ b/linux-user/host/riscv/hostdep.h
@@ -5,8 +5,8 @@ 
  * See the COPYING file in the top-level directory.
  */
 
-#ifndef RISCV64_HOSTDEP_H
-#define RISCV64_HOSTDEP_H
+#ifndef RISCV_HOSTDEP_H
+#define RISCV_HOSTDEP_H
 
 /* We have a safe-syscall.inc.S */
 #define HAVE_SAFE_SYSCALL
diff --git a/linux-user/host/riscv32/hostdep.h b/linux-user/host/riscv32/hostdep.h
deleted file mode 100644
index adf9edbf2d..0000000000
--- a/linux-user/host/riscv32/hostdep.h
+++ /dev/null
@@ -1,11 +0,0 @@ 
-/*
- * hostdep.h : things which are dependent on the host architecture
- *
- * This work is licensed under the terms of the GNU GPL, version 2 or later.
- * See the COPYING file in the top-level directory.
- */
-
-#ifndef RISCV32_HOSTDEP_H
-#define RISCV32_HOSTDEP_H
-
-#endif
diff --git a/linux-user/host/riscv64/safe-syscall.inc.S b/linux-user/host/riscv/safe-syscall.inc.S
similarity index 100%
rename from linux-user/host/riscv64/safe-syscall.inc.S
rename to linux-user/host/riscv/safe-syscall.inc.S