diff mbox series

[v5,22/67] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup

Message ID 20211015041053.2769193-23-richard.henderson@linaro.org
State Superseded
Headers show
Series user-only: Cleanup SIGSEGV and SIGBUS handling | expand

Commit Message

Richard Henderson Oct. 15, 2021, 4:10 a.m. UTC
Use the new os interface for raising the exception,
rather than calling arm_cpu_tlb_fill directly.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/mte_helper.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

-- 
2.25.1

Comments

Warner Losh Oct. 15, 2021, 6:34 p.m. UTC | #1
On Thu, Oct 14, 2021 at 10:11 PM Richard Henderson <
richard.henderson@linaro.org> wrote:

> Use the new os interface for raising the exception,

> rather than calling arm_cpu_tlb_fill directly.

>

> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/mte_helper.c | 6 ++----

>  1 file changed, 2 insertions(+), 4 deletions(-)

>


Reviewed-by: Warner Losh <imp@bsdimp.com>



> diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c

> index 724175210b..e09b7e46a2 100644

> --- a/target/arm/mte_helper.c

> +++ b/target/arm/mte_helper.c

> @@ -84,10 +84,8 @@ static uint8_t *allocation_tag_mem(CPUARMState *env,

> int ptr_mmu_idx,

>      uintptr_t index;

>

>      if (!(flags & (ptr_access == MMU_DATA_STORE ? PAGE_WRITE_ORG :

> PAGE_READ))) {

> -        /* SIGSEGV */

> -        arm_cpu_tlb_fill(env_cpu(env), ptr, ptr_size, ptr_access,

> -                         ptr_mmu_idx, false, ra);

> -        g_assert_not_reached();

> +        cpu_loop_exit_sigsegv(env_cpu(env), ptr, ptr_access,

> +                              !(flags & PAGE_VALID), ra);

>      }

>

>      /* Require both MAP_ANON and PROT_MTE for the page. */

> --

> 2.25.1

>

>
<div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Oct 14, 2021 at 10:11 PM Richard Henderson &lt;<a href="mailto:richard.henderson@linaro.org">richard.henderson@linaro.org</a>&gt; wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Use the new os interface for raising the exception,<br>
rather than calling arm_cpu_tlb_fill directly.<br>
<br>
Reviewed-by: Philippe Mathieu-Daudé &lt;<a href="mailto:f4bug@amsat.org" target="_blank">f4bug@amsat.org</a>&gt;<br>

Signed-off-by: Richard Henderson &lt;<a href="mailto:richard.henderson@linaro.org" target="_blank">richard.henderson@linaro.org</a>&gt;<br>

---<br>
 target/arm/mte_helper.c | 6 ++----<br>
 1 file changed, 2 insertions(+), 4 deletions(-)<br></blockquote><div><br></div><div><div>Reviewed-by: Warner Losh &lt;<a href="mailto:imp@bsdimp.com">imp@bsdimp.com</a>&gt;</div></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c<br>
index 724175210b..e09b7e46a2 100644<br>
--- a/target/arm/mte_helper.c<br>
+++ b/target/arm/mte_helper.c<br>
@@ -84,10 +84,8 @@ static uint8_t *allocation_tag_mem(CPUARMState *env, int ptr_mmu_idx,<br>
     uintptr_t index;<br>
<br>
     if (!(flags &amp; (ptr_access == MMU_DATA_STORE ? PAGE_WRITE_ORG : PAGE_READ))) {<br>
-        /* SIGSEGV */<br>
-        arm_cpu_tlb_fill(env_cpu(env), ptr, ptr_size, ptr_access,<br>
-                         ptr_mmu_idx, false, ra);<br>
-        g_assert_not_reached();<br>
+        cpu_loop_exit_sigsegv(env_cpu(env), ptr, ptr_access,<br>
+                              !(flags &amp; PAGE_VALID), ra);<br>
     }<br>
<br>
     /* Require both MAP_ANON and PROT_MTE for the page. */<br>
-- <br>
2.25.1<br>
<br>
</blockquote></div></div>
diff mbox series

Patch

diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c
index 724175210b..e09b7e46a2 100644
--- a/target/arm/mte_helper.c
+++ b/target/arm/mte_helper.c
@@ -84,10 +84,8 @@  static uint8_t *allocation_tag_mem(CPUARMState *env, int ptr_mmu_idx,
     uintptr_t index;
 
     if (!(flags & (ptr_access == MMU_DATA_STORE ? PAGE_WRITE_ORG : PAGE_READ))) {
-        /* SIGSEGV */
-        arm_cpu_tlb_fill(env_cpu(env), ptr, ptr_size, ptr_access,
-                         ptr_mmu_idx, false, ra);
-        g_assert_not_reached();
+        cpu_loop_exit_sigsegv(env_cpu(env), ptr, ptr_access,
+                              !(flags & PAGE_VALID), ra);
     }
 
     /* Require both MAP_ANON and PROT_MTE for the page. */