From patchwork Fri Oct 1 17:11:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 515104 Delivered-To: patch@linaro.org Received: by 2002:a02:606e:0:0:0:0:0 with SMTP id d46csp1032028jaf; Fri, 1 Oct 2021 10:58:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJygvUJiphZylmk7jB8F5Igf10h6bPBEL59C5GVluTQG2V+C6e4x6u+rENvS51ueqT+kXh8D X-Received: by 2002:a37:4656:: with SMTP id t83mr10684278qka.207.1633111113576; Fri, 01 Oct 2021 10:58:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633111113; cv=none; d=google.com; s=arc-20160816; b=B75vLJurTpjea5ECdI9hdMuclrGrwPyoFtGQsW8pOaqpKnqrXioKvzpBD9MYUwei7q JIUjLlcd+EsPOgkjob0RZtBCQtSb2SdZX5XMsa2vqFuNn/7y0ESza7G/9vGiHMQIyR1b PlKboc/jRmZxqPDg96c6QvE36vj/NiUqLCQQa9oeEpmLRgOZ1n3k/zFWN2Iqdl+t6g25 BLee63zzZO6QEeO/9eLYBBP6+XFmOmlA5VvSyMnSU2fV+TDaagnFPYkuW1NePSn6IcNL ggOBk7+J6QmX8q5YTLCdyvAZ9rLNrGEAPZWtAwIOwBDe8WVoDVhCmXsnSyN7HFZ5Fi/x wteg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=jEmAGke+Q2SF6dInMRgXkKJGhuJtK6GWTLvXnPINEiA=; b=EYEjAYuXa4JmzZ0ea7wsdcHdxQIZy1hPqhSEuYjkl0OvCpYQe2ZR8Mpepka8+KiSxi ySixQa0gP3Ykc6ZDvpH5I4bujPGA816byNhDHNanT8Epb+mLv6g9zrrDl667wW8V6XCv F68q26RmW+7jqYqR7dusWJoF5DYxQnz/tSLZBqXqcnXDZfyX2KSmogyWaCJXpf/q+GFS a8oqcXqjQsfY29CdnieAXxnbawwKi+pqCn1dxMHFhfhm4MPwlObiEDo84P25xUS7d0t6 GLyF1RrBgNvP2p2upzuSA1CmWJjPjYb/G/65bWXbHHQfntagJ0cOHkKXXdtmvPIEJNIF I5JA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=g22jRRh5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id i15si4895607qkn.118.2021.10.01.10.58.33 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Oct 2021 10:58:33 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=g22jRRh5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49466 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mWMno-0006gE-TM for patch@linaro.org; Fri, 01 Oct 2021 13:58:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55182) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mWM5I-0005Fp-9y for qemu-devel@nongnu.org; Fri, 01 Oct 2021 13:12:35 -0400 Received: from mail-qt1-x82e.google.com ([2607:f8b0:4864:20::82e]:40669) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mWM5D-0005Kz-CU for qemu-devel@nongnu.org; Fri, 01 Oct 2021 13:12:32 -0400 Received: by mail-qt1-x82e.google.com with SMTP id b16so9624701qtt.7 for ; Fri, 01 Oct 2021 10:12:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jEmAGke+Q2SF6dInMRgXkKJGhuJtK6GWTLvXnPINEiA=; b=g22jRRh55mZ5K8H4u4kGvD3IkpvkvmwQDSYSIbTxkIX18IMGlxIcUclxX9JedDNm7J e72Bu3fT10hpvk18l1cGIivyM77+qTK9/UoUvSbKGzpPmp0lstvlKbKJxI+jQyf/T7mR IO2cgwHEJtkW7ShIBIrkj/9S/p9XGZGoAmhfGjH5l+ULWBoV28j5x7jIPZXldoQngSS7 emXc43CtTY3KVTgEv9mwX8jlTOb2938cpDMt4qVKH2QgKjkfi3nhQT4/nJ5Pc05t2U+S vjuw/tuP/UbH72iiAFLSp3mXxKBJWABVyh9qCML/1uOpkEehZZOBXF/qoqmyME+53vg4 mLMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jEmAGke+Q2SF6dInMRgXkKJGhuJtK6GWTLvXnPINEiA=; b=wU8Y9UaGoBuqlyBYOMRO00YNrsBPZCLOcKXUDZ8vsRSlRrLWmbZEnO1XskADZpN2Ri XTUZtF5GeK3sIefVzJHkbG7qylxVUlfsyKNsAMbwzpsNJ8avC4H/aEBO/YwD/f1NleoL wev0FhLF827tX4pQ/ojeDJgmXXdloq4vSEBNKcMdwvslHd9Tlev/jii/xeFzucLtb9ox CFrRwsx0dE3AbEYpfuq6/R9ZAapn1BiWQcYn/72t3PL4WUMqBfdFaBSAqSmq2oyTCPjK 4C2ydHILqfwxFoNJiFsNlvA03gDELdQRQJnSYYYTa1fh/KiYP67SiwjjqlEShX9ROnOb Hjdg== X-Gm-Message-State: AOAM531ePWKxuF9BuClQKDtV0ngeR3EYTaCTQctXT+hhkAflN3ZSpSjW WgKVTmj+byIY9I+QILj4AdFoR+f3qnHDGA== X-Received: by 2002:ac8:434d:: with SMTP id a13mr14325274qtn.91.1633108345528; Fri, 01 Oct 2021 10:12:25 -0700 (PDT) Received: from localhost.localdomain (c-67-174-166-185.hsd1.ga.comcast.net. [67.174.166.185]) by smtp.gmail.com with ESMTPSA id y15sm3557250qko.78.2021.10.01.10.12.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Oct 2021 10:12:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 37/41] target/s390x: Implement s390_cpu_record_sigsegv Date: Fri, 1 Oct 2021 13:11:47 -0400 Message-Id: <20211001171151.1739472-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211001171151.1739472-1-richard.henderson@linaro.org> References: <20211001171151.1739472-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::82e; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82e.google.com X-Spam_score_int: -1 X-Spam_score: -0.2 X-Spam_bar: / X-Spam_report: (-0.2 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, alex.bennee@linaro.org, laurent@vivier.eu, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Move the masking of the address from cpu_loop into s390_cpu_record_sigsegv -- this is governed by hw, not linux. This does mean we have to raise our own exception, rather than return to the fallback. Use maperr to choose between PGM_PROTECTION and PGM_ADDRESSING. Use the appropriate si_code for each in cpu_loop. Cc: qemu-s390x@nongnu.org Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/s390x-internal.h | 13 ++++++++++--- linux-user/s390x/cpu_loop.c | 13 ++++++------- target/s390x/cpu.c | 6 ++++-- target/s390x/tcg/excp_helper.c | 18 +++++++++++------- 4 files changed, 31 insertions(+), 19 deletions(-) -- 2.25.1 diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 27d4a03ca1..163aa4f94a 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -270,13 +270,20 @@ ObjectClass *s390_cpu_class_by_name(const char *name); void s390x_cpu_debug_excp_handler(CPUState *cs); void s390_cpu_do_interrupt(CPUState *cpu); bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req); -bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) QEMU_NORETURN; +#ifdef CONFIG_USER_ONLY +void s390_cpu_record_sigsegv(CPUState *cs, vaddr address, + MMUAccessType access_type, + bool maperr, uintptr_t retaddr); +#else +bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); +#endif + /* fpu_helper.c */ uint32_t set_cc_nz_f32(float32 v); diff --git a/linux-user/s390x/cpu_loop.c b/linux-user/s390x/cpu_loop.c index 69b69981f6..d089c8417e 100644 --- a/linux-user/s390x/cpu_loop.c +++ b/linux-user/s390x/cpu_loop.c @@ -24,8 +24,6 @@ #include "cpu_loop-common.h" #include "signal-common.h" -/* s390x masks the fault address it reports in si_addr for SIGSEGV and SIGBUS */ -#define S390X_FAIL_ADDR_MASK -4096LL static int get_pgm_data_si_code(int dxc_code) { @@ -111,12 +109,13 @@ void cpu_loop(CPUS390XState *env) n = TARGET_ILL_ILLOPC; goto do_signal_pc; case PGM_PROTECTION: + force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_ACCERR, + env->__excp_addr); + break; case PGM_ADDRESSING: - sig = TARGET_SIGSEGV; - /* XXX: check env->error_code */ - n = TARGET_SEGV_MAPERR; - addr = env->__excp_addr & S390X_FAIL_ADDR_MASK; - goto do_signal; + force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR, + env->__excp_addr); + break; case PGM_EXECUTE: case PGM_SPECIFICATION: case PGM_SPECIAL_OP: diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 7b7b05f1d3..593dda75c4 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -266,9 +266,11 @@ static void s390_cpu_reset_full(DeviceState *dev) static const struct TCGCPUOps s390_tcg_ops = { .initialize = s390x_translate_init, - .tlb_fill = s390_cpu_tlb_fill, -#if !defined(CONFIG_USER_ONLY) +#ifdef CONFIG_USER_ONLY + .record_sigsegv = s390_cpu_record_sigsegv, +#else + .tlb_fill = s390_cpu_tlb_fill, .cpu_exec_interrupt = s390_cpu_exec_interrupt, .do_interrupt = s390_cpu_do_interrupt, .debug_excp_handler = s390x_cpu_debug_excp_handler, diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index 3d6662a53c..b923d080fc 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -89,16 +89,20 @@ void s390_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) +void s390_cpu_record_sigsegv(CPUState *cs, vaddr address, + MMUAccessType access_type, + bool maperr, uintptr_t retaddr) { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING); - /* On real machines this value is dropped into LowMem. Since this - is userland, simply put this someplace that cpu_loop can find it. */ - cpu->env.__excp_addr = address; + trigger_pgm_exception(&cpu->env, maperr ? PGM_ADDRESSING : PGM_PROTECTION); + /* + * On real machines this value is dropped into LowMem. Since this + * is userland, simply put this someplace that cpu_loop can find it. + * S390 only gives the page of the fault, not the exact address. + * C.f. the construction of TEC in mmu_translate(). + */ + cpu->env.__excp_addr = address & TARGET_PAGE_MASK; cpu_loop_exit_restore(cs, retaddr); }