From patchwork Fri Oct 1 17:11:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 515063 Delivered-To: patch@linaro.org Received: by 2002:a02:606e:0:0:0:0:0 with SMTP id d46csp1004596jaf; Fri, 1 Oct 2021 10:22:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxnAdeaosYbbpUxYOvpTKrn7Ql7UfQPXSBsWHeg3QF1XqZJK30NEr5JBjFbjF1TSgd+UOju X-Received: by 2002:a05:622a:1212:: with SMTP id y18mr14292375qtx.395.1633108951396; Fri, 01 Oct 2021 10:22:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633108951; cv=none; d=google.com; s=arc-20160816; b=Aj7pf4gtkwh0P/HqWntO3uQPUeREzijWg4CSofWaEFceOLjdStGAr3ZFLpu3ZBxgfc Pww5XgzLpL0czAKQG64pSzM8zOmYC7eiK7u7P1Iq04du0SNoihheMA2k93gK6tlpf6GJ SWBLDzrI3+ReXrOynCTYetWJCsUygusvGnfRAFKk976RZTdcTuWEIfWfDbk5vdjmKymZ HntItOidVZVSfo8V1O+Mg2c2Dhoc9pWEJlBlDdfmrV8Ci0dWSklqsVVzUmbTwhwP6WA1 cmCBdDNQO6VTpNVm7sc9z4Eh9PCqEMh/3RvOMo4nivGfOLPtywxmGuctSJVQp8AXglEg Nldg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=kQq48uinsO7YylDhnHpQEq7bEF7K0DH0ooQKeZ28gIs=; b=rvYlKozA6/0nR0mxNJn1NtyM6bQ0PhvkfQrAlxgN0VDVQ59k8SuVevLgulpKAT691K BGAJrlTZ743xrsgyh8W79B9QknylZ6Hr0l9KSZgOfxbQE2BSkBR0xvPCLZuommjKs7+Q bRHQyN/3AWjAKSqWH5dQsMO1zu0XvIUwHLt/Xsn/Surnbd9RrUWcJXygT44AhkHibvJr 3/2QmR6p31s+eAkgKo5z10L8uo8hGasQEddeT9AdgIVvhzDSGaEN10Pj1pVEVuMg5Q8t u3u4T9A1OZwdf3Nye9bnkeFCLudF5Y4draLDDlfUbzmAWtsSsKDVUdzsRR3LNYD5hXo1 I9DQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=P7sgxRwK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s5si4646465uap.170.2021.10.01.10.22.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Oct 2021 10:22:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=P7sgxRwK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41568 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mWMEw-0002EF-QM for patch@linaro.org; Fri, 01 Oct 2021 13:22:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54916) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mWM54-00052y-4K for qemu-devel@nongnu.org; Fri, 01 Oct 2021 13:12:18 -0400 Received: from mail-qk1-x72e.google.com ([2607:f8b0:4864:20::72e]:46050) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mWM52-0005DI-0j for qemu-devel@nongnu.org; Fri, 01 Oct 2021 13:12:17 -0400 Received: by mail-qk1-x72e.google.com with SMTP id q125so9797793qkd.12 for ; Fri, 01 Oct 2021 10:12:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kQq48uinsO7YylDhnHpQEq7bEF7K0DH0ooQKeZ28gIs=; b=P7sgxRwKcGnzx8/NU7x2zpkmBdAQ8+FhiZOPALlK4fdZ3iS2eRQnNxSm7h3/+iZ6PP rsXgcY4KYj/1gPMwtis9OrynI7ELmTk6xY1TJyUVeU2/AVmmcm6fyNX7oq5mJht55q+C yLUXpzqlGPj+/gV71fg7uw2+KmlfbAeZ5Qm8vcdchVHrK0pHxUAXk+HfjGXBTOkPlFWu U3W2Cuzhc1ouEDH3iRltjWIfuWe4W4DH25IoVMFL1lMG93fG+MkWbSm46l597fLtPdaS yLDojQdfjhi8/ORN6p7EHKSMWMpKaTm6d8x6d7EYBdnPMeoQvrbBmZ8NnNDbQz3BZ4lV Ce2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kQq48uinsO7YylDhnHpQEq7bEF7K0DH0ooQKeZ28gIs=; b=h5Mms0Iitp3b7tIJoDhdN2nftipZOdhZUQwBboghdR7AZjlFfHIUBCYBeuFINm5zRp 4tVTnTvv78KOWCXfidcgep6BGAUsX3yQOFquY0+pfYvGXQzPCSz4A9nqyFBZdwv6h4wR S3r+yM02r2zW/NBWcMMYhqPF1ymxXvazKoV9KnonBASWFpwdNAl3vW5KMU6ZwqGr6iDy S+XJ/FF0cR94cyZhQJSKANhQEGpe9UMg9Atx0vqULWwcz8/jkMeiEELxvhkekRvBclFm xKfkWLV18QH6APRBu9TDBZRL1WgvwUTu3B/SxziPjOmOMftOVPikv9RytUczRkvvvRrJ Adjg== X-Gm-Message-State: AOAM533qjE5Gjs+Q59CcjreHYm1P0TnLT8qfqZJpvjvE76PRwPiMzkdH zZrtdflspI+MWepWFt75JUtlBFOaGEKfCQ== X-Received: by 2002:a37:41ca:: with SMTP id o193mr10861873qka.187.1633108335112; Fri, 01 Oct 2021 10:12:15 -0700 (PDT) Received: from localhost.localdomain (c-67-174-166-185.hsd1.ga.comcast.net. [67.174.166.185]) by smtp.gmail.com with ESMTPSA id y15sm3557250qko.78.2021.10.01.10.12.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Oct 2021 10:12:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 25/41] target/hexagon: Remove hexagon_cpu_tlb_fill Date: Fri, 1 Oct 2021 13:11:35 -0400 Message-Id: <20211001171151.1739472-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211001171151.1739472-1-richard.henderson@linaro.org> References: <20211001171151.1739472-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::72e; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Taylor Simpson , alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for hexagon. Remove the code from cpu_loop that raises SIGSEGV. Cc: Taylor Simpson Signed-off-by: Richard Henderson --- linux-user/hexagon/cpu_loop.c | 24 +----------------------- target/hexagon/cpu.c | 23 ----------------------- 2 files changed, 1 insertion(+), 46 deletions(-) -- 2.25.1 Reviewed-by: Taylor Simpson diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c index bee2a9e4ea..6b24cbaba9 100644 --- a/linux-user/hexagon/cpu_loop.c +++ b/linux-user/hexagon/cpu_loop.c @@ -28,8 +28,7 @@ void cpu_loop(CPUHexagonState *env) { CPUState *cs = env_cpu(env); - int trapnr, signum, sigcode; - target_ulong sigaddr; + int trapnr; target_ulong syscallnum; target_ulong ret; @@ -39,10 +38,6 @@ void cpu_loop(CPUHexagonState *env) cpu_exec_end(cs); process_queued_cpu_work(cs); - signum = 0; - sigcode = 0; - sigaddr = 0; - switch (trapnr) { case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ @@ -65,12 +60,6 @@ void cpu_loop(CPUHexagonState *env) env->gpr[0] = ret; } break; - case HEX_EXCP_FETCH_NO_UPAGE: - case HEX_EXCP_PRIV_NO_UREAD: - case HEX_EXCP_PRIV_NO_UWRITE: - signum = TARGET_SIGSEGV; - sigcode = TARGET_SEGV_MAPERR; - break; case EXCP_ATOMIC: cpu_exec_step_atomic(cs); break; @@ -79,17 +68,6 @@ void cpu_loop(CPUHexagonState *env) trapnr); exit(EXIT_FAILURE); } - - if (signum) { - target_siginfo_t info = { - .si_signo = signum, - .si_errno = 0, - .si_code = sigcode, - ._sifields._sigfault._addr = sigaddr - }; - queue_signal(env, info.si_signo, QEMU_SI_KILL, &info); - } - process_pending_signals(env); } } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 3338365c16..160a46a3d5 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -245,34 +245,11 @@ static void hexagon_cpu_init(Object *obj) qdev_property_add_static(DEVICE(obj), &hexagon_lldb_stack_adjust_property); } -static bool hexagon_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ -#ifdef CONFIG_USER_ONLY - switch (access_type) { - case MMU_INST_FETCH: - cs->exception_index = HEX_EXCP_FETCH_NO_UPAGE; - break; - case MMU_DATA_LOAD: - cs->exception_index = HEX_EXCP_PRIV_NO_UREAD; - break; - case MMU_DATA_STORE: - cs->exception_index = HEX_EXCP_PRIV_NO_UWRITE; - break; - } - cpu_loop_exit_restore(cs, retaddr); -#else -#error System mode not implemented for Hexagon -#endif -} - #include "hw/core/tcg-cpu-ops.h" static const struct TCGCPUOps hexagon_tcg_ops = { .initialize = hexagon_translate_init, .synchronize_from_tb = hexagon_cpu_synchronize_from_tb, - .tlb_fill = hexagon_tlb_fill, }; static void hexagon_cpu_class_init(ObjectClass *c, void *data)