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[209.51.188.17]) by mx.google.com with ESMTPS id c26si443588vsk.158.2021.09.18.12.24.07 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 18 Sep 2021 12:24:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=c3DuABvM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46250 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfwV-0001tk-3J for patch@linaro.org; Sat, 18 Sep 2021 15:24:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54654) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLo-0005Nj-1q for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:12 -0400 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]:39821) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLi-0006xc-3r for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:11 -0400 Received: by mail-pg1-x530.google.com with SMTP id g184so13086196pgc.6 for ; Sat, 18 Sep 2021 11:46:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ONHPGv0AvpF9KQATDBu+SfMWLuLooluHmc8c/gF2z5A=; b=c3DuABvMfWVFlJI6cwA3gmYr1DibOy/mj7gDlt0ge4O5y0piUKcR5vapFJhlg20g71 8qO4KVrkDJejclFl7kfoQtyJzVG+NNd4vJYM8UdhO3GWu8fzxJ0SACM0lq7yDWjgFMk2 WPRWPdWVhWS9gm1jNx0y4wsxcSFtzSYpSrzEDGP13QiHbkYxsew8skyhziioI819vkIG OYnLx/JBVOyIOIG5JlWr6YPiXDYM88AQ+lFlyjVHUGr4borXEh6Kd1alEtiZWIDfHOvE DnUcVnYOSR3f9/LfrHUI2orV9EoCFZjugGJXKq8LNssWttLkJLVsnD8tYQMBHZ67o2Zv ggdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ONHPGv0AvpF9KQATDBu+SfMWLuLooluHmc8c/gF2z5A=; b=Q2+J9ApHXmedH4NrhUUTBWxdp776JHkIkiJyiMayLru0mRsyGJXk9ZBgJles5OSy69 k92w9+OQBV6sezJ9Tl1f4atuwHcW3U0YNCsWyCr2z1OMBQNEbQ7lUxavq5Xh5167S2S3 SelXFFDsZrqLvJgmhuvxOsUvDxQXXg2ueG4DvIxob2QTKgGLDqbxM2pNifBJHKzUiZl1 V454pV3VcEEuTe+RoAiFkwdxhFegHolkKjIZwwKKMLudMW57sSnnn2ojRm6zFV1NW3eD IZ00D8zQXl9zuKI3xQ9T0pw6+H3YBphvJPFabTybotONWVjRLTvKFcsDKSSlcOUB0jO4 z/TQ== X-Gm-Message-State: AOAM5328PieuobR52vyzhg+GcZz0x7/TOmggSLQrICXpNlTeXNg4HpmX 46ayJs5++WjrLqU8FcfhJDhen65wdUDU5Q== X-Received: by 2002:a62:a11b:0:b0:444:64df:9f2 with SMTP id b27-20020a62a11b000000b0044464df09f2mr11759144pff.31.1631990759348; Sat, 18 Sep 2021 11:45:59 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 37/41] target/s390x: Implement s390_cpu_record_sigsegv Date: Sat, 18 Sep 2021 11:45:23 -0700 Message-Id: <20210918184527.408540-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Move the masking of the address from cpu_loop into s390_cpu_record_sigsegv -- this is governed by hw, not linux. This does mean we have to raise our own exception, rather than return to the fallback. Use maperr to choose between PGM_PROTECTION and PGM_ADDRESSING. Use the appropriate si_code for each in cpu_loop. Signed-off-by: Richard Henderson --- target/s390x/s390x-internal.h | 13 ++++++++++--- linux-user/s390x/cpu_loop.c | 14 +++++++------- target/s390x/cpu.c | 6 ++++-- target/s390x/tcg/excp_helper.c | 18 +++++++++++------- 4 files changed, 32 insertions(+), 19 deletions(-) -- 2.25.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 7a6aa4dacc..2b6791a3a2 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -270,13 +270,20 @@ ObjectClass *s390_cpu_class_by_name(const char *name); void s390x_cpu_debug_excp_handler(CPUState *cs); void s390_cpu_do_interrupt(CPUState *cpu); bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req); -bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr); +#ifdef CONFIG_USER_ONLY +void s390_cpu_record_sigsegv(CPUState *cs, vaddr address, + MMUAccessType access_type, + bool maperr, uintptr_t retaddr); +#else +bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); +#endif + /* fpu_helper.c */ uint32_t set_cc_nz_f32(float32 v); diff --git a/linux-user/s390x/cpu_loop.c b/linux-user/s390x/cpu_loop.c index 6a69a6dd26..7a1d032227 100644 --- a/linux-user/s390x/cpu_loop.c +++ b/linux-user/s390x/cpu_loop.c @@ -21,9 +21,8 @@ #include "qemu-common.h" #include "qemu.h" #include "cpu_loop-common.h" +#include "signal-common.h" -/* s390x masks the fault address it reports in si_addr for SIGSEGV and SIGBUS */ -#define S390X_FAIL_ADDR_MASK -4096LL static int get_pgm_data_si_code(int dxc_code) { @@ -109,12 +108,13 @@ void cpu_loop(CPUS390XState *env) n = TARGET_ILL_ILLOPC; goto do_signal_pc; case PGM_PROTECTION: + force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_ACCERR, + env->__excp_addr); + break; case PGM_ADDRESSING: - sig = TARGET_SIGSEGV; - /* XXX: check env->error_code */ - n = TARGET_SEGV_MAPERR; - addr = env->__excp_addr & S390X_FAIL_ADDR_MASK; - goto do_signal; + force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR, + env->__excp_addr); + break; case PGM_EXECUTE: case PGM_SPECIFICATION: case PGM_SPECIAL_OP: diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index df8ade9021..fa999d586d 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -268,10 +268,12 @@ static void s390_cpu_reset_full(DeviceState *dev) static const struct TCGCPUOps s390_tcg_ops = { .initialize = s390x_translate_init, - .tlb_fill = s390_cpu_tlb_fill, -#if !defined(CONFIG_USER_ONLY) +#ifdef CONFIG_USER_ONLY + .record_sigsegv = s390_cpu_record_sigsegv, +#else .has_work = s390_cpu_has_work, + .tlb_fill = s390_cpu_tlb_fill, .cpu_exec_interrupt = s390_cpu_exec_interrupt, .do_interrupt = s390_cpu_do_interrupt, .debug_excp_handler = s390x_cpu_debug_excp_handler, diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index 3d6662a53c..b923d080fc 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -89,16 +89,20 @@ void s390_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) +void s390_cpu_record_sigsegv(CPUState *cs, vaddr address, + MMUAccessType access_type, + bool maperr, uintptr_t retaddr) { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING); - /* On real machines this value is dropped into LowMem. Since this - is userland, simply put this someplace that cpu_loop can find it. */ - cpu->env.__excp_addr = address; + trigger_pgm_exception(&cpu->env, maperr ? PGM_ADDRESSING : PGM_PROTECTION); + /* + * On real machines this value is dropped into LowMem. Since this + * is userland, simply put this someplace that cpu_loop can find it. + * S390 only gives the page of the fault, not the exact address. + * C.f. the construction of TEC in mmu_translate(). + */ + cpu->env.__excp_addr = address & TARGET_PAGE_MASK; cpu_loop_exit_restore(cs, retaddr); }