From patchwork Sat Sep 18 18:44:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 514233 Delivered-To: patch@linaro.org Received: by 2002:a02:c816:0:0:0:0:0 with SMTP id p22csp671691jao; Sat, 18 Sep 2021 12:00:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwLK+3eE+P8bfmSfGq/gg5pQJo1+jZfk2gOXTWUcmQ1KSfVOFSILupxY1jeksZR1QoIQVO1 X-Received: by 2002:a25:d6cf:: with SMTP id n198mr20970496ybg.535.1631991600772; Sat, 18 Sep 2021 12:00:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631991600; cv=none; d=google.com; s=arc-20160816; b=b9cdXk3HN+/GppPXukXtDhSo0sJsaN4Jps0HIC+GaQtipbPf7YW/bh8Rts+PrkMxmJ v7K5qVyNkGzxIfHUbxV2n4d9S1BzqWBXryZXTthO+DFCgq7PdWQPLX7VT5eenzzB54Lo TUJlRdoj2PM72dJfX9v3Gm9XO2hvz+g6bMpU9BKI+mJIfwa5CDs1T6b+lbHtj6axMkwb jiKUXoTrAtV6VwloRuLy3lPI66MDJK7CoyjjDiqC43uAO7gzMlgesxC+XIqkYSKdLw0B xP0/wUOUBdUYC8izhheaXUZTGQ9K4zSCV3cZN9JTjtAT3J4OWfbflgjEprKkkuR5Xczp INkQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=sCS25t/S/07LT/4q9hu7ybFQaqd9aKvTlaQnlQkDGSw=; b=sn0J91rEsN7Dc30ncesWnX/iQFjooMA1QqrFOAEe5fKje8x4W2sDmrUiY//4U3D+Ia QwuTwVFb/BlBFRoFUpSKq1rA57ucAyvaHQMwhjpv6V5AltsqwdSxV67kD09j/ug7Tn/j OJO3oAVAfddBxVlbMcNhisTp/mwyjrrx0+YVt6VgBp5eh2Dgr/YNiQJ4dundvPzRLU02 O3CVoXkEp40d60eACrtiTFgWcGg/hLWz7fJUIpDToBvi/uPVvZyx71aTUOi4UAnkSRtr BEKPwzdS10kjMczwbpzzmrLPWeTws7OdhokIY8GXmnjR30GzRov32XXCTOfm5rV7vIW5 f5Zw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Vp2sGT18; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g6si10591736ybb.205.2021.09.18.12.00.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 18 Sep 2021 12:00:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Vp2sGT18; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41782 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfZA-0002iw-6U for patch@linaro.org; Sat, 18 Sep 2021 15:00:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54204) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLK-00052Q-RL for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:43 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]:52172) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLI-0006m9-00 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:42 -0400 Received: by mail-pj1-x1036.google.com with SMTP id dw14so9179701pjb.1 for ; Sat, 18 Sep 2021 11:45:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sCS25t/S/07LT/4q9hu7ybFQaqd9aKvTlaQnlQkDGSw=; b=Vp2sGT18b2W/SP/8Cb+DZnoCgQy8OdRkWcjxnYVfJr5238XGvPSZPLJ9lC2m/fvZPn PDGkyeDMVzpxJvZXJFAR2tZHCLjoh75l8Alh+LHPLFgKIY/ZuDho0XwDvEfY90bcTwEu 3tBP3ZyAC2QTFKlFcUfDEUNeu56Uqtze42EN8z5pGE3nin3kQiSTlOA/tGJV6XfiMA4/ VXLPF2g2kmSEu1tnvk+INDqcxxrDynSjf7oC6p83eKcuirQzt3OuFQvLObPRwlyq/VYA V3oFRdgUR5Ax6j6i7f259gvO34znnxeRC0SVYw7gdARhWG6Se08dk3hCQvMKEOIDvee9 UoiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sCS25t/S/07LT/4q9hu7ybFQaqd9aKvTlaQnlQkDGSw=; b=0bTxqFFIdhlr7QyGoazalFQPGq1lAoE2DOxQsp0g9Mwyk+6wfmKsMhXrPE0oe1Z7aI 1KPulMbamm8EXCOuSnIhaQLl5vauMiplhWOdRihojpkbeZwDbzQJ41I10Hkd9vEeQFLg cZYvvr5+kWqHRu2v08pxwqAc5lCY1roKYdjCWIzvJXdIcgJ3R1gPofTl9InCVnxqs0rr Uj5aEQ99BMzb9jnPpcU1K5WHj4HBNzP4JHzSWqlQ+jDrv/ktOvyrvmuWum3Uy9O2g5G2 v7qfUrh6HjJRheCzGOk7x1I0WZ+IAC9CrCY1i3YucCyZTde/OeiFf8J0nzjIRL5oGC9X J60A== X-Gm-Message-State: AOAM530FAUP5h1BXviiYWrnBwPwQpR7Trqw/727/zvIdhku1aOiQixYZ mIAqqMPZYcsE6oXghqIEfd6koWyWDSxOJQ== X-Received: by 2002:a17:90b:4b52:: with SMTP id mi18mr19506767pjb.112.1631990738295; Sat, 18 Sep 2021 11:45:38 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 11/41] linux-user/host/arm: Populate host_signal.h Date: Sat, 18 Sep 2021 11:44:57 -0700 Message-Id: <20210918184527.408540-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Drop the *BSD code, to be re-created under bsd-user/ later. Signed-off-by: Richard Henderson --- linux-user/host/arm/host-signal.h | 30 ++++++++++++++++++++- accel/tcg/user-exec.c | 45 +------------------------------ 2 files changed, 30 insertions(+), 45 deletions(-) -- 2.25.1 diff --git a/linux-user/host/arm/host-signal.h b/linux-user/host/arm/host-signal.h index f4b4d65031..6932224c1c 100644 --- a/linux-user/host/arm/host-signal.h +++ b/linux-user/host/arm/host-signal.h @@ -1 +1,29 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef ARM_HOST_SIGNAL_H +#define ARM_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.arm_pc; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + /* + * In the FSR, bit 11 is WnR, assuming a v6 or + * later processor. On v5 we will always report + * this as a read, which will fail later. + */ + uint32_t fsr = uc->uc_mcontext.error_code; + return extract32(fsr, 11, 1); +} + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index c7d083db92..e9c29f917d 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,50 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__arm__) - -#if defined(__NetBSD__) -#include -#include -#endif - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; -#if defined(__NetBSD__) - ucontext_t *uc = puc; - siginfo_t *si = pinfo; -#else - ucontext_t *uc = puc; -#endif - unsigned long pc; - uint32_t fsr; - int is_write; - -#if defined(__NetBSD__) - pc = uc->uc_mcontext.__gregs[_REG_R15]; -#elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3)) - pc = uc->uc_mcontext.gregs[R15]; -#else - pc = uc->uc_mcontext.arm_pc; -#endif - -#ifdef __NetBSD__ - fsr = si->si_trap; -#else - fsr = uc->uc_mcontext.error_code; -#endif - /* - * In the FSR, bit 11 is WnR, assuming a v6 or - * later processor. On v5 we will always report - * this as a read, which will fail later. - */ - is_write = extract32(fsr, 11, 1); - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} - -#elif defined(__aarch64__) +#if defined(__aarch64__) #if defined(__NetBSD__)