From patchwork Tue Sep 14 00:14:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 510496 Delivered-To: patch@linaro.org Received: by 2002:a02:c816:0:0:0:0:0 with SMTP id p22csp1059825jao; Mon, 13 Sep 2021 17:48:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzvJApqXIOy3dz+qF38n/lk64R5MyeWdKRbu4h1IC/OBL674s7+Nls354CVMjAbZBai+KGS X-Received: by 2002:a05:6638:1393:: with SMTP id w19mr12385450jad.86.1631580502251; Mon, 13 Sep 2021 17:48:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631580502; cv=none; d=google.com; s=arc-20160816; b=e8XmaQTlRD5ibF/Dv3XJbNkLKxvP3niAxM/uNZuE2rqlbkLm/mhWEL1Q5x/E9LeZyk 2tQQmnqveYAcqEyQQCouph4vnneBEOHSiTQ6GGOxUx1be+B+BrvpKLdBSFcnn2T/IaK1 aI7pAHzx8XMtLUAs7yaRdJ52QlZLjY8sZurxTq/4eqdOUgbvMTfSaxGRmiUfYuGZd48A is1DW/Z3RwHKtgWpr0TnoVOJT1FpTu2BxR9WTsr2YW68ipa7j7u8C2wlFEj4AZ2Mwcju KRBMX0rDJFf0ZhymnamNoAk3DqcUAhJsNr7ajhsOkYKi3vY8fLns7zOsynKF/8m0OmUu IBCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=fdyym3tRuWcxUVb7GR3eybl5FQ5L8A5RDTBUJNCEnuc=; b=xkvLKPXzZtYU+sYecmUVRWo5uFXCCSNQ0eJIC0iZkxRGCX/Xln+qNnaikpxzQ07TeF Myvl13i0EhtIov5TUinDTQ47Q00kPdipFBZfdxxersVK9VnNNDfcRFCgfjTbUlchns6K 938MOXBh/y/6m58InJDtdO3v5O0zm2uyUKhSogBsWvTQKu4c88LX7qdxZDFtzPEfzzV4 zb+KaTNd8MoSp105EANZ8cghvq3fcSqt611oIf7wA07jrpngFoZczgNufTSJkLE7YhS2 pPGwZyuxkMTDLXNw5hPTwkUCV5BuB1BKlm9IA+kjUKjq6aebsWcy3dewj1yliB75QZYv lefg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sI3hEkGk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d21si2337111iof.73.2021.09.13.17.48.22 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Sep 2021 17:48:22 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sI3hEkGk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:57022 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mPwcX-0004om-Ni for patch@linaro.org; Mon, 13 Sep 2021 20:48:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53584) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mPw6T-0001kn-Od for qemu-devel@nongnu.org; Mon, 13 Sep 2021 20:15:15 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]:42577) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mPw6P-0007fu-5w for qemu-devel@nongnu.org; Mon, 13 Sep 2021 20:15:13 -0400 Received: by mail-pl1-x635.google.com with SMTP id n4so6966080plh.9 for ; Mon, 13 Sep 2021 17:15:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fdyym3tRuWcxUVb7GR3eybl5FQ5L8A5RDTBUJNCEnuc=; b=sI3hEkGkSsGLjDX+cmNzinBv882Rl1uTMPZR+pqyyHrBofuuv6n7oPOM/9Zhnem5dY TtOJgGotR1wgftiI9t2+SE3p4MOctAemeZYwjZJSOeGiwBZsw2gm9vdbmJaSNWVZYT09 Nt4/rMCMtXf2za2Lo44Eu11sHoGv0jyc14ALOzCqjI2IjgnpnkMDez7F0+fM8Q9FVRSB 6x5cP3TkVFDlDGZmpvP2Qug2qE63842qeSajpuxMluwIUnpltULkzeP5ToWMM/EYKMly KvUBNGV+LpVjgexZzYfuIY2ymBx3XeMqlhWClg8DnirCVM8AFhesHHmyMN7lstvycGv0 xD3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fdyym3tRuWcxUVb7GR3eybl5FQ5L8A5RDTBUJNCEnuc=; b=xMGqv3oNdfcoWa40xBM2kxd15aHKpXIbQFY+/FzpdLEy6VRILf2TFMAcwDr3/6SkBw FDkWzHD3vFaoHIaFdrYlWnkcPsOgzrSIC0SVlMqDJb7HfkU5KBI6ZEEZD9Om/o8iGuAq IM3VEutME1NkdHuku/8QGIbRrWQY7HLYWV6pkUxkAVBh4JaDshVIIam53v7rzAzE4fkL e/mM0Wrr3csMqiYkBttlOuiuS/rj4V0V8W+3NuGEAxdvxoSCYgNHpkVh6SbuVGrAyTq9 mNxmOawmxU1O04cnlAMYyCLoHxNDy105+3cZ3WFgl1KUdMUwZESEvIIo3VIZ/OVm+BkX u1Bw== X-Gm-Message-State: AOAM530d8hli2wPLh4ZDbzq6/gtq7hJb9f5sUhsWYmv4tlWIam9nh/0M 4L051zpohFtbO3OVnmlOcRBdqx9tEFW1mw== X-Received: by 2002:a17:902:aa88:b0:13a:95d:d059 with SMTP id d8-20020a170902aa8800b0013a095dd059mr12769638plr.65.1631578507762; Mon, 13 Sep 2021 17:15:07 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id m7sm9334179pgn.32.2021.09.13.17.15.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Sep 2021 17:15:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 13/44] accel/tcg: Rename user-mode do_interrupt hack as fake_user_interrupt Date: Mon, 13 Sep 2021 17:14:25 -0700 Message-Id: <20210914001456.793490-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210914001456.793490-1-richard.henderson@linaro.org> References: <20210914001456.793490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Warner Losh Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé do_interrupt() is sysemu specific. However due to some X86 specific hack, it is also used in user-mode emulation, which is why it couldn't be restricted to CONFIG_SOFTMMU (see the comment around added in commit 78271684719: "cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass"). Keep the hack but rename the handler as fake_user_interrupt() and restrict do_interrupt() to sysemu. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Reviewed-by: Richard Henderson Message-Id: <20210911165434.531552-6-f4bug@amsat.org> Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 22 ++++++++++++++-------- accel/tcg/cpu-exec.c | 4 ++-- target/i386/tcg/tcg-cpu.c | 6 ++++-- 3 files changed, 20 insertions(+), 12 deletions(-) -- 2.25.1 diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index eab27d0c03..6c7ab9600b 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -37,14 +37,6 @@ struct TCGCPUOps { void (*cpu_exec_exit)(CPUState *cpu); /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */ bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); - /** - * @do_interrupt: Callback for interrupt handling. - * - * note that this is in general SOFTMMU only, but it actually isn't - * because of an x86 hack (accel/tcg/cpu-exec.c), so we cannot put it - * in the SOFTMMU section in general. - */ - void (*do_interrupt)(CPUState *cpu); /** * @tlb_fill: Handle a softmmu tlb miss or user-only address fault * @@ -61,6 +53,20 @@ struct TCGCPUOps { void (*debug_excp_handler)(CPUState *cpu); #ifdef NEED_CPU_H +#if defined(CONFIG_USER_ONLY) && defined(TARGET_I386) + /** + * @fake_user_interrupt: Callback for 'fake exception' handling. + * + * Simulate 'fake exception' which will be handled outside the + * cpu execution loop (hack for x86 user mode). + */ + void (*fake_user_interrupt)(CPUState *cpu); +#else + /** + * @do_interrupt: Callback for interrupt handling. + */ + void (*do_interrupt)(CPUState *cpu); +#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */ #ifdef CONFIG_SOFTMMU /** * @do_transaction_failed: Callback for handling failed memory transactions diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index e5c0ccd1a2..2838177e7f 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -651,8 +651,8 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) loop */ #if defined(TARGET_I386) CPUClass *cc = CPU_GET_CLASS(cpu); - cc->tcg_ops->do_interrupt(cpu); -#endif + cc->tcg_ops->fake_user_interrupt(cpu); +#endif /* TARGET_I386 */ *ret = cpu->exception_index; cpu->exception_index = -1; return true; diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 93a79a5741..04c35486a2 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -73,9 +73,11 @@ static const struct TCGCPUOps x86_tcg_ops = { .cpu_exec_enter = x86_cpu_exec_enter, .cpu_exec_exit = x86_cpu_exec_exit, .cpu_exec_interrupt = x86_cpu_exec_interrupt, - .do_interrupt = x86_cpu_do_interrupt, .tlb_fill = x86_cpu_tlb_fill, -#ifndef CONFIG_USER_ONLY +#ifdef CONFIG_USER_ONLY + .fake_user_interrupt = x86_cpu_do_interrupt, +#else + .do_interrupt = x86_cpu_do_interrupt, .debug_excp_handler = breakpoint_handler, .debug_check_breakpoint = x86_debug_check_breakpoint, #endif /* !CONFIG_USER_ONLY */