diff mbox series

[PULL,10/44] target/i386: Restrict sysemu-only fpu_helper helpers

Message ID 20210914001456.793490-11-richard.henderson@linaro.org
State Accepted
Commit 7ce088659846b7f27eb26afd31249eebf529f2b3
Headers show
Series tcg patch queue, v2 | expand

Commit Message

Richard Henderson Sept. 14, 2021, 12:14 a.m. UTC 
From: Philippe Mathieu-Daudé <f4bug@amsat.org>


Restrict some sysemu-only fpu_helper helpers (see commit
83a3d9c7402: "i386: separate fpu_helper sysemu-only parts").

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Warner Losh <imp@bsdimp.com>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Message-Id: <20210911165434.531552-3-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/i386/cpu.h | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.25.1
diff mbox series

Patch

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 71ae3141c3..1a36c53c18 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1837,11 +1837,14 @@  void x86_cpu_list(void);
 int cpu_x86_support_mca_broadcast(CPUX86State *env);
 
 int cpu_get_pic_interrupt(CPUX86State *s);
+
+#ifndef CONFIG_USER_ONLY
 /* MSDOS compatibility mode FPU exception support */
 void x86_register_ferr_irq(qemu_irq irq);
 void fpu_check_raise_ferr_irq(CPUX86State *s);
 void cpu_set_ignne(void);
 void cpu_clear_ignne(void);
+#endif
 
 /* mpx_helper.c */
 void cpu_sync_bndcs_hflags(CPUX86State *env);