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[209.51.188.17]) by mx.google.com with ESMTPS id z12si3246694ilu.56.2021.08.19.02.08.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 19 Aug 2021 02:08:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dYbDHBne; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:58670 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mGe2i-0004Al-Tg for patch@linaro.org; Thu, 19 Aug 2021 05:08:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43114) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mGdzI-000645-Au for qemu-devel@nongnu.org; Thu, 19 Aug 2021 05:05:24 -0400 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]:35516) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mGdzF-0000Cd-BP for qemu-devel@nongnu.org; Thu, 19 Aug 2021 05:05:23 -0400 Received: by mail-pg1-x52c.google.com with SMTP id e7so5267762pgk.2 for ; Thu, 19 Aug 2021 02:05:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xvHkMx0NJrAIX0G63nBDwHxvlJhJWW1IfOl+Smg9tUc=; b=dYbDHBneINNY+nO8/LhZ39BYtDrftAXxLJBpBcJdnTknuhP68RArlLxJG8UWZJzUvM ZxbOc44o5p5eTx+2tFV8QDY0ccAmX7/Iw4XPGeM+a65+oHMdsQNkn++fsl53gMfw4az5 kR7MjLYxXR8D0joOnza17LXaJbnCnyCv8wZYcJo94eJH89HY8b5zHcndi7K88UYvXpPL hoBpezzzuOlHBpjuCqfKf+EFuB84NsCFq5xOa7nERFiSNLXtnxxwx3p1Hy8lje6NJNqw U3goU8iGgaJ183yf0Q6w2/EirSsnH2GxmWgMN8t003L5kIZETxrCkki7jECuzuqE8SVb RW/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xvHkMx0NJrAIX0G63nBDwHxvlJhJWW1IfOl+Smg9tUc=; b=YszcZpSoBFa2ihVs5JaiJA7FFaeehTBRgMACEvPvjHNpK68u5iLyfrCXLDMMb5uSzm xad6UKXeuWKL+vxHH2OsIJSUXXjqZDed+KrKFwAaSzF2rLpxeLkDVTPZmt/Ud9A81HzD mnSg+jjoDqSRBISXD9UAPdT0wV/BZMM4yyyPIgxPndogYmTY7AFplaVVd5j+7p1PUVYU bI3d+9PGPgXQn4N/FAFh1Y+lwbYXnjg64Xa6RKd3cfeWtBla5L9m4PRzBqxirFbvK6Sg yIwLv0luTcyvk+UG56R6eiZSG7I2NEQWSjN0AgTl9RXRdjkH6artim+5N6kZa3O7pWEz Pxsg== X-Gm-Message-State: AOAM53012aYqhb3Bk/GYFvF0GbDFpHjEWXB/CxyfWKYzD3+qKjW0zD1L iDk9a94CaBW1NBNhTkpOATGuuCtIGPkRRg== X-Received: by 2002:a05:6a00:1748:b0:3e2:ace4:82b7 with SMTP id j8-20020a056a00174800b003e2ace482b7mr10878151pfc.56.1629363919701; Thu, 19 Aug 2021 02:05:19 -0700 (PDT) Received: from localhost.localdomain ([173.197.107.15]) by smtp.gmail.com with ESMTPSA id j13sm2944707pgp.29.2021.08.19.02.05.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Aug 2021 02:05:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 08/21] target/riscv: Move gen_* helpers for RVM Date: Wed, 18 Aug 2021 23:04:49 -1000 Message-Id: <20210819090502.428068-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210819090502.428068-1-richard.henderson@linaro.org> References: <20210819090502.428068-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair.francis@wdc.com, bin.meng@windriver.com, qemu-riscv@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bin Meng Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Move these helpers near their use by the trans_* functions within insn_trans/trans_rvm.c.inc. Reviewed-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/riscv/translate.c | 115 ------------------------ target/riscv/insn_trans/trans_rvm.c.inc | 115 ++++++++++++++++++++++++ 2 files changed, 115 insertions(+), 115 deletions(-) -- 2.25.1 Reviewed-by: Alistair Francis diff --git a/target/riscv/translate.c b/target/riscv/translate.c index bc40b9c701..7fbacfa6ee 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -249,121 +249,6 @@ static void gen_set_gpr(DisasContext *ctx, int reg_num, TCGv t) } } -static void gen_mulhsu(TCGv ret, TCGv arg1, TCGv arg2) -{ - TCGv rl = tcg_temp_new(); - TCGv rh = tcg_temp_new(); - - tcg_gen_mulu2_tl(rl, rh, arg1, arg2); - /* fix up for one negative */ - tcg_gen_sari_tl(rl, arg1, TARGET_LONG_BITS - 1); - tcg_gen_and_tl(rl, rl, arg2); - tcg_gen_sub_tl(ret, rh, rl); - - tcg_temp_free(rl); - tcg_temp_free(rh); -} - -static void gen_div(TCGv ret, TCGv source1, TCGv source2) -{ - TCGv temp1, temp2, zero, one, mone, min; - - /* - * Handle by altering args to tcg_gen_div to produce req'd results: - * For overflow: want source1 in temp1 and 1 in temp2 - * For div by zero: want -1 in temp1 and 1 in temp2 -> -1 result - */ - temp1 = tcg_temp_new(); - temp2 = tcg_temp_new(); - zero = tcg_constant_tl(0); - one = tcg_constant_tl(1); - mone = tcg_constant_tl(-1); - min = tcg_constant_tl(1ull << (TARGET_LONG_BITS - 1)); - - tcg_gen_setcond_tl(TCG_COND_EQ, temp1, source1, min); - tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, mone); - tcg_gen_and_tl(temp1, temp1, temp2); /* temp1 = overflow */ - tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, zero); /* temp2 = div0 */ - tcg_gen_or_tl(temp2, temp2, temp1); /* temp2 = overflow | div0 */ - - /* if div by zero, set temp1 to -1, else source1. */ - tcg_gen_movcond_tl(TCG_COND_EQ, temp1, source2, zero, mone, source1); - - /* if overflow or div by zero, set temp2 to 1, else source2 */ - tcg_gen_movcond_tl(TCG_COND_NE, temp2, temp2, zero, one, source2); - - tcg_gen_div_tl(ret, temp1, temp2); - - tcg_temp_free(temp1); - tcg_temp_free(temp2); -} - -static void gen_divu(TCGv ret, TCGv source1, TCGv source2) -{ - TCGv temp1, temp2, zero, one, max; - - temp1 = tcg_temp_new(); - temp2 = tcg_temp_new(); - zero = tcg_constant_tl(0); - one = tcg_constant_tl(1); - max = tcg_constant_tl(~0); - - tcg_gen_movcond_tl(TCG_COND_EQ, temp1, source2, zero, max, source1); - tcg_gen_movcond_tl(TCG_COND_EQ, temp2, source2, zero, one, source2); - tcg_gen_divu_tl(ret, temp1, temp2); - - tcg_temp_free(temp1); - tcg_temp_free(temp2); -} - -static void gen_rem(TCGv ret, TCGv source1, TCGv source2) -{ - TCGv temp1, temp2, zero, one, mone, min; - - temp1 = tcg_temp_new(); - temp2 = tcg_temp_new(); - zero = tcg_constant_tl(0); - one = tcg_constant_tl(1); - mone = tcg_constant_tl(-1); - min = tcg_constant_tl(1ull << (TARGET_LONG_BITS - 1)); - - tcg_gen_setcond_tl(TCG_COND_EQ, temp1, source1, min); - tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, mone); - tcg_gen_and_tl(temp1, temp1, temp2); /* temp1 = overflow */ - tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, zero); /* temp2 = div0 */ - tcg_gen_or_tl(temp2, temp2, temp1); /* temp2 = overflow | div0 */ - - /* - * if overflow or div by zero, set temp2 to 1, else source2 - * this automatically takes care of returning the original - * dividend for div by zero. - */ - tcg_gen_movcond_tl(TCG_COND_NE, temp2, temp2, zero, one, source2); - - tcg_gen_rem_tl(ret, source1, temp2); - - tcg_temp_free(temp1); - tcg_temp_free(temp2); -} - -static void gen_remu(TCGv ret, TCGv source1, TCGv source2) -{ - TCGv temp2, zero, one; - - temp2 = tcg_temp_new(); - zero = tcg_constant_tl(0); - one = tcg_constant_tl(1); - - /* - * if div by zero, set temp2 to 1, else source2 - * this automatically takes care of returning the original dividend. - */ - tcg_gen_movcond_tl(TCG_COND_EQ, temp2, source2, zero, one, source2); - tcg_gen_remu_tl(ret, source1, temp2); - - tcg_temp_free(temp2); -} - static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) { target_ulong next_pc; diff --git a/target/riscv/insn_trans/trans_rvm.c.inc b/target/riscv/insn_trans/trans_rvm.c.inc index 80552be7a3..28bdfbca70 100644 --- a/target/riscv/insn_trans/trans_rvm.c.inc +++ b/target/riscv/insn_trans/trans_rvm.c.inc @@ -39,6 +39,21 @@ static bool trans_mulh(DisasContext *ctx, arg_mulh *a) return gen_arith(ctx, a, EXT_NONE, gen_mulh); } +static void gen_mulhsu(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv rl = tcg_temp_new(); + TCGv rh = tcg_temp_new(); + + tcg_gen_mulu2_tl(rl, rh, arg1, arg2); + /* fix up for one negative */ + tcg_gen_sari_tl(rl, arg1, TARGET_LONG_BITS - 1); + tcg_gen_and_tl(rl, rl, arg2); + tcg_gen_sub_tl(ret, rh, rl); + + tcg_temp_free(rl); + tcg_temp_free(rh); +} + static bool trans_mulhsu(DisasContext *ctx, arg_mulhsu *a) { REQUIRE_EXT(ctx, RVM); @@ -59,24 +74,124 @@ static bool trans_mulhu(DisasContext *ctx, arg_mulhu *a) return gen_arith(ctx, a, EXT_NONE, gen_mulhu); } +static void gen_div(TCGv ret, TCGv source1, TCGv source2) +{ + TCGv temp1, temp2, zero, one, mone, min; + + /* + * Handle by altering args to tcg_gen_div to produce req'd results: + * For overflow: want source1 in temp1 and 1 in temp2 + * For div by zero: want -1 in temp1 and 1 in temp2 -> -1 result + */ + temp1 = tcg_temp_new(); + temp2 = tcg_temp_new(); + zero = tcg_constant_tl(0); + one = tcg_constant_tl(1); + mone = tcg_constant_tl(-1); + min = tcg_constant_tl(1ull << (TARGET_LONG_BITS - 1)); + + tcg_gen_setcond_tl(TCG_COND_EQ, temp1, source1, min); + tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, mone); + tcg_gen_and_tl(temp1, temp1, temp2); /* temp1 = overflow */ + tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, zero); /* temp2 = div0 */ + tcg_gen_or_tl(temp2, temp2, temp1); /* temp2 = overflow | div0 */ + + /* if div by zero, set temp1 to -1, else source1. */ + tcg_gen_movcond_tl(TCG_COND_EQ, temp1, source2, zero, mone, source1); + + /* if overflow or div by zero, set temp2 to 1, else source2 */ + tcg_gen_movcond_tl(TCG_COND_NE, temp2, temp2, zero, one, source2); + + tcg_gen_div_tl(ret, temp1, temp2); + + tcg_temp_free(temp1); + tcg_temp_free(temp2); +} + static bool trans_div(DisasContext *ctx, arg_div *a) { REQUIRE_EXT(ctx, RVM); return gen_arith(ctx, a, EXT_SIGN, gen_div); } +static void gen_divu(TCGv ret, TCGv source1, TCGv source2) +{ + TCGv temp1, temp2, zero, one, max; + + temp1 = tcg_temp_new(); + temp2 = tcg_temp_new(); + zero = tcg_constant_tl(0); + one = tcg_constant_tl(1); + max = tcg_constant_tl(~0); + + tcg_gen_movcond_tl(TCG_COND_EQ, temp1, source2, zero, max, source1); + tcg_gen_movcond_tl(TCG_COND_EQ, temp2, source2, zero, one, source2); + tcg_gen_divu_tl(ret, temp1, temp2); + + tcg_temp_free(temp1); + tcg_temp_free(temp2); +} + static bool trans_divu(DisasContext *ctx, arg_divu *a) { REQUIRE_EXT(ctx, RVM); return gen_arith(ctx, a, EXT_ZERO, gen_divu); } +static void gen_rem(TCGv ret, TCGv source1, TCGv source2) +{ + TCGv temp1, temp2, zero, one, mone, min; + + temp1 = tcg_temp_new(); + temp2 = tcg_temp_new(); + zero = tcg_constant_tl(0); + one = tcg_constant_tl(1); + mone = tcg_constant_tl(-1); + min = tcg_constant_tl(1ull << (TARGET_LONG_BITS - 1)); + + tcg_gen_setcond_tl(TCG_COND_EQ, temp1, source1, min); + tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, mone); + tcg_gen_and_tl(temp1, temp1, temp2); /* temp1 = overflow */ + tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, zero); /* temp2 = div0 */ + tcg_gen_or_tl(temp2, temp2, temp1); /* temp2 = overflow | div0 */ + + /* + * if overflow or div by zero, set temp2 to 1, else source2 + * this automatically takes care of returning the original + * dividend for div by zero. + */ + tcg_gen_movcond_tl(TCG_COND_NE, temp2, temp2, zero, one, source2); + + tcg_gen_rem_tl(ret, source1, temp2); + + tcg_temp_free(temp1); + tcg_temp_free(temp2); +} + static bool trans_rem(DisasContext *ctx, arg_rem *a) { REQUIRE_EXT(ctx, RVM); return gen_arith(ctx, a, EXT_SIGN, gen_rem); } +static void gen_remu(TCGv ret, TCGv source1, TCGv source2) +{ + TCGv temp2, zero, one; + + temp2 = tcg_temp_new(); + zero = tcg_constant_tl(0); + one = tcg_constant_tl(1); + + /* + * if div by zero, set temp2 to 1, else source2 + * this automatically takes care of returning the original dividend. + */ + tcg_gen_movcond_tl(TCG_COND_EQ, temp2, source2, zero, one, source2); + tcg_gen_remu_tl(ret, source1, temp2); + + tcg_temp_free(temp2); +} + static bool trans_remu(DisasContext *ctx, arg_remu *a) { REQUIRE_EXT(ctx, RVM);