@@ -70,5 +70,10 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
MemOpIdx oi, uintptr_t retaddr);
+#else
+
+void QEMU_NORETURN helper_unaligned_mmu(CPUArchState *env, target_ulong addr,
+ uint32_t type, uintptr_t ra);
+
#endif /* CONFIG_SOFTMMU */
#endif /* TCG_LDST_H */
@@ -27,6 +27,7 @@
#include "exec/helper-proto.h"
#include "qemu/atomic128.h"
#include "trace/trace-root.h"
+#include "tcg/tcg-ldst.h"
#undef EAX
#undef ECX
@@ -866,9 +867,9 @@ static void validate_memop(MemOpIdx oi, MemOp expected)
#endif
}
-static void cpu_unaligned_access(CPUState *cpu, vaddr addr,
- MMUAccessType access_type,
- int mmu_idx, uintptr_t ra)
+static void QEMU_NORETURN
+cpu_unaligned_access(CPUState *cpu, vaddr addr, MMUAccessType access_type,
+ int mmu_idx, uintptr_t ra)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
@@ -876,6 +877,12 @@ static void cpu_unaligned_access(CPUState *cpu, vaddr addr,
g_assert_not_reached();
}
+void helper_unaligned_mmu(CPUArchState *env, target_ulong addr,
+ uint32_t access_type, uintptr_t ra)
+{
+ cpu_unaligned_access(env_cpu(env), addr, access_type, MMU_USER_IDX, ra);
+}
+
static void *cpu_mmu_lookup(CPUArchState *env, target_ulong addr,
MemOpIdx oi, uintptr_t ra, MMUAccessType type)
{
To be called from tcg generated code on hosts that support unaligned accesses natively, in response to an access that is supposed to be aligned. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- include/tcg/tcg-ldst.h | 5 +++++ accel/tcg/user-exec.c | 13 ++++++++++--- 2 files changed, 15 insertions(+), 3 deletions(-) -- 2.25.1