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[204.210.126.223]) by smtp.gmail.com with ESMTPSA id ml9sm5409358pjb.53.2021.07.24.16.27.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Jul 2021 16:27:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH] Revert "accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS" Date: Sat, 24 Jul 2021 13:27:26 -1000 Message-Id: <20210724232726.1223693-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This reverts commit 78ff82bb1b67c0d79113688e4b3427fc99cab9d4. This produces transient errors in the 2018 advent calendar day 11 image for sparc when using -icount auto. It is not clear what the problem is with the narrower CF_COUNT_MASK value, since we bound the insns_left value in cpu_loop_exec_tb and we bound the insns translated in tb_gen_code. But it is late in the release cycle and reverting the change does fix the problem. In the meantime, CF_NO_GOTO_TB, CF_NO_GOTO_PTR and CF_SINGLE_STEP were added and so need to be moved to different bits. Reported-by: Peter Maydell Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 9 ++++----- accel/tcg/translate-all.c | 4 +++- 2 files changed, 7 insertions(+), 6 deletions(-) -- 2.25.1 diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 5d1b6d80fb..bccd7724dc 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -493,16 +493,15 @@ struct TranslationBlock { uint32_t flags; /* flags defining in which context the code was generated */ uint32_t cflags; /* compile flags */ -/* Note that TCG_MAX_INSNS is 512; we validate this match elsewhere. */ -#define CF_COUNT_MASK 0x000001ff -#define CF_NO_GOTO_TB 0x00000200 /* Do not chain with goto_tb */ -#define CF_NO_GOTO_PTR 0x00000400 /* Do not chain with goto_ptr */ -#define CF_SINGLE_STEP 0x00000800 /* gdbstub single-step in effect */ +#define CF_COUNT_MASK 0x00007fff #define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */ #define CF_MEMI_ONLY 0x00010000 /* Only instrument memory ops */ #define CF_USE_ICOUNT 0x00020000 #define CF_INVALID 0x00040000 /* TB is stale. Set with @jmp_lock held */ #define CF_PARALLEL 0x00080000 /* Generate code for a parallel context */ +#define CF_NO_GOTO_TB 0x00100000 /* Do not chain with goto_tb */ +#define CF_NO_GOTO_PTR 0x00200000 /* Do not chain with goto_ptr */ +#define CF_SINGLE_STEP 0x00400000 /* gdbstub single-step in effect */ #define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ #define CF_CLUSTER_SHIFT 24 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index bbfcfb698c..0226123981 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1428,9 +1428,11 @@ TranslationBlock *tb_gen_code(CPUState *cpu, max_insns = cflags & CF_COUNT_MASK; if (max_insns == 0) { + max_insns = CF_COUNT_MASK; + } + if (max_insns > TCG_MAX_INSNS) { max_insns = TCG_MAX_INSNS; } - QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 != TCG_MAX_INSNS); buffer_overflow: tb = tcg_tb_alloc(tcg_ctx);