| Message ID | 20210709042608.883256-8-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/riscv: Use tcg_constant_* | expand |
On Fri, Jul 9, 2021 at 2:32 PM Richard Henderson <richard.henderson@linaro.org> wrote: > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/insn_trans/trans_rvi.c.inc | 45 +++++++++++++++---------- > 1 file changed, 28 insertions(+), 17 deletions(-) > > diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_trans/trans_rvi.c.inc > index a603925637..a422dc9ef4 100644 > --- a/target/riscv/insn_trans/trans_rvi.c.inc > +++ b/target/riscv/insn_trans/trans_rvi.c.inc > @@ -138,15 +138,21 @@ static bool trans_bgeu(DisasContext *ctx, arg_bgeu *a) > > static bool gen_load(DisasContext *ctx, arg_lb *a, MemOp memop) > { > - TCGv t0 = tcg_temp_new(); > - TCGv t1 = tcg_temp_new(); > - gen_get_gpr(t0, a->rs1); > - tcg_gen_addi_tl(t0, t0, a->imm); > + TCGv dest = gpr_dst(ctx, a->rd); > + TCGv addr = gpr_src(ctx, a->rs1); > + TCGv temp = NULL; > > - tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, memop); > - gen_set_gpr(a->rd, t1); > - tcg_temp_free(t0); > - tcg_temp_free(t1); > + if (a->imm) { > + temp = tcg_temp_new(); > + tcg_gen_addi_tl(temp, addr, a->imm); > + addr = temp; > + } > + > + tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, memop); > + > + if (temp) { > + tcg_temp_free(temp); > + } > return true; > } > > @@ -177,19 +183,24 @@ static bool trans_lhu(DisasContext *ctx, arg_lhu *a) > > static bool gen_store(DisasContext *ctx, arg_sb *a, MemOp memop) > { > - TCGv t0 = tcg_temp_new(); > - TCGv dat = tcg_temp_new(); > - gen_get_gpr(t0, a->rs1); > - tcg_gen_addi_tl(t0, t0, a->imm); > - gen_get_gpr(dat, a->rs2); > + TCGv addr = gpr_src(ctx, a->rs1); > + TCGv data = gpr_src(ctx, a->rs2); > + TCGv temp = NULL; > > - tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx, memop); > - tcg_temp_free(t0); > - tcg_temp_free(dat); > + if (a->imm) { > + temp = tcg_temp_new(); > + tcg_gen_addi_tl(temp, addr, a->imm); > + addr = temp; > + } > + > + tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, memop); > + > + if (temp) { > + tcg_temp_free(temp); > + } > return true; > } > > - > static bool trans_sb(DisasContext *ctx, arg_sb *a) > { > return gen_store(ctx, a, MO_SB); > -- > 2.25.1 > >
diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_trans/trans_rvi.c.inc index a603925637..a422dc9ef4 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -138,15 +138,21 @@ static bool trans_bgeu(DisasContext *ctx, arg_bgeu *a) static bool gen_load(DisasContext *ctx, arg_lb *a, MemOp memop) { - TCGv t0 = tcg_temp_new(); - TCGv t1 = tcg_temp_new(); - gen_get_gpr(t0, a->rs1); - tcg_gen_addi_tl(t0, t0, a->imm); + TCGv dest = gpr_dst(ctx, a->rd); + TCGv addr = gpr_src(ctx, a->rs1); + TCGv temp = NULL; - tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, memop); - gen_set_gpr(a->rd, t1); - tcg_temp_free(t0); - tcg_temp_free(t1); + if (a->imm) { + temp = tcg_temp_new(); + tcg_gen_addi_tl(temp, addr, a->imm); + addr = temp; + } + + tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, memop); + + if (temp) { + tcg_temp_free(temp); + } return true; } @@ -177,19 +183,24 @@ static bool trans_lhu(DisasContext *ctx, arg_lhu *a) static bool gen_store(DisasContext *ctx, arg_sb *a, MemOp memop) { - TCGv t0 = tcg_temp_new(); - TCGv dat = tcg_temp_new(); - gen_get_gpr(t0, a->rs1); - tcg_gen_addi_tl(t0, t0, a->imm); - gen_get_gpr(dat, a->rs2); + TCGv addr = gpr_src(ctx, a->rs1); + TCGv data = gpr_src(ctx, a->rs2); + TCGv temp = NULL; - tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx, memop); - tcg_temp_free(t0); - tcg_temp_free(dat); + if (a->imm) { + temp = tcg_temp_new(); + tcg_gen_addi_tl(temp, addr, a->imm); + addr = temp; + } + + tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, memop); + + if (temp) { + tcg_temp_free(temp); + } return true; } - static bool trans_sb(DisasContext *ctx, arg_sb *a) { return gen_store(ctx, a, MO_SB);
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/riscv/insn_trans/trans_rvi.c.inc | 45 +++++++++++++++---------- 1 file changed, 28 insertions(+), 17 deletions(-) -- 2.25.1