| Message ID | 20210621125115.67717-2-bruno.larsen@eldorado.org.br |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,01/10] target/ppc: Remove PowerPCCPUClass.handle_mmu_fault | expand |
On Mon, 21 Jun 2021 09:51:06 -0300 "Bruno Larsen (billionai)" <bruno.larsen@eldorado.org.br> wrote: > From: Richard Henderson <richard.henderson@linaro.org> > > Instead, use a switch on env->mmu_model. This avoids some > replicated information in cpu setup. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- Very nice ! Reviewed-by: Greg Kurz <groug@kaod.org> > target/ppc/cpu-qom.h | 1 - > target/ppc/cpu_init.c | 45 ----------------------------------------- > target/ppc/mmu_helper.c | 24 ++++++++++++++++++---- > 3 files changed, 20 insertions(+), 50 deletions(-) > > diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h > index 06b6571bc9..3b14d2f134 100644 > --- a/target/ppc/cpu-qom.h > +++ b/target/ppc/cpu-qom.h > @@ -198,7 +198,6 @@ struct PowerPCCPUClass { > int n_host_threads; > void (*init_proc)(CPUPPCState *env); > int (*check_pow)(CPUPPCState *env); > - int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx); > bool (*interrupts_big_endian)(PowerPCCPU *cpu); > }; > > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c > index d0411e7302..3a8d8d3f07 100644 > --- a/target/ppc/cpu_init.c > +++ b/target/ppc/cpu_init.c > @@ -4578,9 +4578,6 @@ POWERPC_FAMILY(601)(ObjectClass *oc, void *data) > (1ull << MSR_IR) | > (1ull << MSR_DR); > pcc->mmu_model = POWERPC_MMU_601; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_601; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_601; > @@ -4623,9 +4620,6 @@ POWERPC_FAMILY(601v)(ObjectClass *oc, void *data) > (1ull << MSR_IR) | > (1ull << MSR_DR); > pcc->mmu_model = POWERPC_MMU_601; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_601; > pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_HID0_LE; > @@ -4889,9 +4883,6 @@ POWERPC_FAMILY(604)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_604; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_604; > @@ -4973,9 +4964,6 @@ POWERPC_FAMILY(604E)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_604; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_604; > @@ -5044,9 +5032,6 @@ POWERPC_FAMILY(740)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5124,9 +5109,6 @@ POWERPC_FAMILY(750)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5327,9 +5309,6 @@ POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5410,9 +5389,6 @@ POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5498,9 +5474,6 @@ POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5586,9 +5559,6 @@ POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5828,9 +5798,6 @@ POWERPC_FAMILY(7400)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -5914,9 +5881,6 @@ POWERPC_FAMILY(7410)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -6743,9 +6707,6 @@ POWERPC_FAMILY(e600)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -7505,7 +7466,6 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data) > (1ull << MSR_RI); > pcc->mmu_model = POWERPC_MMU_64B; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_basic; > #endif > pcc->excp_model = POWERPC_EXCP_970; > @@ -7583,7 +7543,6 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) > LPCR_RMI | LPCR_HDICE; > pcc->mmu_model = POWERPC_MMU_2_03; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_basic; > pcc->lrg_decr_bits = 32; > #endif > @@ -7727,7 +7686,6 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2; > pcc->mmu_model = POWERPC_MMU_2_06; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > #endif > @@ -7904,7 +7862,6 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) > LPCR_P8_PECE3 | LPCR_P8_PECE4; > pcc->mmu_model = POWERPC_MMU_2_07; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > pcc->n_host_threads = 8; > @@ -8120,7 +8077,6 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; > pcc->mmu_model = POWERPC_MMU_3_00; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; > /* segment page size remain the same */ > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER9_radix_page_info; > @@ -8332,7 +8288,6 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; > pcc->mmu_model = POWERPC_MMU_3_00; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; > /* segment page size remain the same */ > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER10_radix_page_info; > diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c > index 1ecb36e85a..c4b1c93e47 100644 > --- a/target/ppc/mmu_helper.c > +++ b/target/ppc/mmu_helper.c > @@ -2947,14 +2947,30 @@ bool ppc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, > bool probe, uintptr_t retaddr) > { > PowerPCCPU *cpu = POWERPC_CPU(cs); > - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); > CPUPPCState *env = &cpu->env; > int ret; > > - if (pcc->handle_mmu_fault) { > - ret = pcc->handle_mmu_fault(cpu, addr, access_type, mmu_idx); > - } else { > + switch (env->mmu_model) { > +#if defined(TARGET_PPC64) > + case POWERPC_MMU_64B: > + case POWERPC_MMU_2_03: > + case POWERPC_MMU_2_06: > + case POWERPC_MMU_2_07: > + ret = ppc_hash64_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > + case POWERPC_MMU_3_00: > + ret = ppc64_v3_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > +#endif > + > + case POWERPC_MMU_32B: > + case POWERPC_MMU_601: > + ret = ppc_hash32_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > + > + default: > ret = cpu_ppc_handle_mmu_fault(env, addr, access_type, mmu_idx); > + break; > } > if (unlikely(ret != 0)) { > if (probe) {
On Mon, Jun 21, 2021 at 09:51:06AM -0300, Bruno Larsen (billionai) wrote: > From: Richard Henderson <richard.henderson@linaro.org> > > Instead, use a switch on env->mmu_model. This avoids some > replicated information in cpu setup. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> As I mentioned on the earlier posting, I don't love the overall direction of this change (I want to move more towards hooks and things in the cpu class than magical model constants and switches all over the place). But.. the cleanups this allows in the short term are worth the small step backwards. So, applied to ppc-for-6.1. > --- > target/ppc/cpu-qom.h | 1 - > target/ppc/cpu_init.c | 45 ----------------------------------------- > target/ppc/mmu_helper.c | 24 ++++++++++++++++++---- > 3 files changed, 20 insertions(+), 50 deletions(-) > > diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h > index 06b6571bc9..3b14d2f134 100644 > --- a/target/ppc/cpu-qom.h > +++ b/target/ppc/cpu-qom.h > @@ -198,7 +198,6 @@ struct PowerPCCPUClass { > int n_host_threads; > void (*init_proc)(CPUPPCState *env); > int (*check_pow)(CPUPPCState *env); > - int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx); > bool (*interrupts_big_endian)(PowerPCCPU *cpu); > }; > > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c > index d0411e7302..3a8d8d3f07 100644 > --- a/target/ppc/cpu_init.c > +++ b/target/ppc/cpu_init.c > @@ -4578,9 +4578,6 @@ POWERPC_FAMILY(601)(ObjectClass *oc, void *data) > (1ull << MSR_IR) | > (1ull << MSR_DR); > pcc->mmu_model = POWERPC_MMU_601; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_601; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_601; > @@ -4623,9 +4620,6 @@ POWERPC_FAMILY(601v)(ObjectClass *oc, void *data) > (1ull << MSR_IR) | > (1ull << MSR_DR); > pcc->mmu_model = POWERPC_MMU_601; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_601; > pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_HID0_LE; > @@ -4889,9 +4883,6 @@ POWERPC_FAMILY(604)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_604; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_604; > @@ -4973,9 +4964,6 @@ POWERPC_FAMILY(604E)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_604; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_604; > @@ -5044,9 +5032,6 @@ POWERPC_FAMILY(740)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5124,9 +5109,6 @@ POWERPC_FAMILY(750)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5327,9 +5309,6 @@ POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5410,9 +5389,6 @@ POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5498,9 +5474,6 @@ POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5586,9 +5559,6 @@ POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5828,9 +5798,6 @@ POWERPC_FAMILY(7400)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -5914,9 +5881,6 @@ POWERPC_FAMILY(7410)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -6743,9 +6707,6 @@ POWERPC_FAMILY(e600)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -7505,7 +7466,6 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data) > (1ull << MSR_RI); > pcc->mmu_model = POWERPC_MMU_64B; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_basic; > #endif > pcc->excp_model = POWERPC_EXCP_970; > @@ -7583,7 +7543,6 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) > LPCR_RMI | LPCR_HDICE; > pcc->mmu_model = POWERPC_MMU_2_03; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_basic; > pcc->lrg_decr_bits = 32; > #endif > @@ -7727,7 +7686,6 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2; > pcc->mmu_model = POWERPC_MMU_2_06; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > #endif > @@ -7904,7 +7862,6 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) > LPCR_P8_PECE3 | LPCR_P8_PECE4; > pcc->mmu_model = POWERPC_MMU_2_07; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > pcc->n_host_threads = 8; > @@ -8120,7 +8077,6 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; > pcc->mmu_model = POWERPC_MMU_3_00; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; > /* segment page size remain the same */ > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER9_radix_page_info; > @@ -8332,7 +8288,6 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; > pcc->mmu_model = POWERPC_MMU_3_00; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; > /* segment page size remain the same */ > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER10_radix_page_info; > diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c > index 1ecb36e85a..c4b1c93e47 100644 > --- a/target/ppc/mmu_helper.c > +++ b/target/ppc/mmu_helper.c > @@ -2947,14 +2947,30 @@ bool ppc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, > bool probe, uintptr_t retaddr) > { > PowerPCCPU *cpu = POWERPC_CPU(cs); > - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); > CPUPPCState *env = &cpu->env; > int ret; > > - if (pcc->handle_mmu_fault) { > - ret = pcc->handle_mmu_fault(cpu, addr, access_type, mmu_idx); > - } else { > + switch (env->mmu_model) { > +#if defined(TARGET_PPC64) > + case POWERPC_MMU_64B: > + case POWERPC_MMU_2_03: > + case POWERPC_MMU_2_06: > + case POWERPC_MMU_2_07: > + ret = ppc_hash64_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > + case POWERPC_MMU_3_00: > + ret = ppc64_v3_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > +#endif > + > + case POWERPC_MMU_32B: > + case POWERPC_MMU_601: > + ret = ppc_hash32_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > + > + default: > ret = cpu_ppc_handle_mmu_fault(env, addr, access_type, mmu_idx); > + break; > } > if (unlikely(ret != 0)) { > if (probe) { -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 06b6571bc9..3b14d2f134 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -198,7 +198,6 @@ struct PowerPCCPUClass { int n_host_threads; void (*init_proc)(CPUPPCState *env); int (*check_pow)(CPUPPCState *env); - int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx); bool (*interrupts_big_endian)(PowerPCCPU *cpu); }; diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index d0411e7302..3a8d8d3f07 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -4578,9 +4578,6 @@ POWERPC_FAMILY(601)(ObjectClass *oc, void *data) (1ull << MSR_IR) | (1ull << MSR_DR); pcc->mmu_model = POWERPC_MMU_601; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_601; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_601; @@ -4623,9 +4620,6 @@ POWERPC_FAMILY(601v)(ObjectClass *oc, void *data) (1ull << MSR_IR) | (1ull << MSR_DR); pcc->mmu_model = POWERPC_MMU_601; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_601; pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_HID0_LE; @@ -4889,9 +4883,6 @@ POWERPC_FAMILY(604)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_604; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_604; @@ -4973,9 +4964,6 @@ POWERPC_FAMILY(604E)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_604; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_604; @@ -5044,9 +5032,6 @@ POWERPC_FAMILY(740)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_7x0; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_750; @@ -5124,9 +5109,6 @@ POWERPC_FAMILY(750)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_7x0; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_750; @@ -5327,9 +5309,6 @@ POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_7x0; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_750; @@ -5410,9 +5389,6 @@ POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_7x0; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_750; @@ -5498,9 +5474,6 @@ POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_7x0; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_750; @@ -5586,9 +5559,6 @@ POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_7x0; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_750; @@ -5828,9 +5798,6 @@ POWERPC_FAMILY(7400)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_74xx; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_7400; @@ -5914,9 +5881,6 @@ POWERPC_FAMILY(7410)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_74xx; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_7400; @@ -6743,9 +6707,6 @@ POWERPC_FAMILY(e600)(ObjectClass *oc, void *data) (1ull << MSR_RI) | (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_32B; -#if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; -#endif pcc->excp_model = POWERPC_EXCP_74xx; pcc->bus_model = PPC_FLAGS_INPUT_6xx; pcc->bfd_mach = bfd_mach_ppc_7400; @@ -7505,7 +7466,6 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data) (1ull << MSR_RI); pcc->mmu_model = POWERPC_MMU_64B; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; pcc->hash64_opts = &ppc_hash64_opts_basic; #endif pcc->excp_model = POWERPC_EXCP_970; @@ -7583,7 +7543,6 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) LPCR_RMI | LPCR_HDICE; pcc->mmu_model = POWERPC_MMU_2_03; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; pcc->hash64_opts = &ppc_hash64_opts_basic; pcc->lrg_decr_bits = 32; #endif @@ -7727,7 +7686,6 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) pcc->lpcr_pm = LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; pcc->hash64_opts = &ppc_hash64_opts_POWER7; pcc->lrg_decr_bits = 32; #endif @@ -7904,7 +7862,6 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) LPCR_P8_PECE3 | LPCR_P8_PECE4; pcc->mmu_model = POWERPC_MMU_2_07; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; pcc->hash64_opts = &ppc_hash64_opts_POWER7; pcc->lrg_decr_bits = 32; pcc->n_host_threads = 8; @@ -8120,7 +8077,6 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; pcc->mmu_model = POWERPC_MMU_3_00; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; /* segment page size remain the same */ pcc->hash64_opts = &ppc_hash64_opts_POWER7; pcc->radix_page_info = &POWER9_radix_page_info; @@ -8332,7 +8288,6 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; pcc->mmu_model = POWERPC_MMU_3_00; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; /* segment page size remain the same */ pcc->hash64_opts = &ppc_hash64_opts_POWER7; pcc->radix_page_info = &POWER10_radix_page_info; diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 1ecb36e85a..c4b1c93e47 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -2947,14 +2947,30 @@ bool ppc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, bool probe, uintptr_t retaddr) { PowerPCCPU *cpu = POWERPC_CPU(cs); - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); CPUPPCState *env = &cpu->env; int ret; - if (pcc->handle_mmu_fault) { - ret = pcc->handle_mmu_fault(cpu, addr, access_type, mmu_idx); - } else { + switch (env->mmu_model) { +#if defined(TARGET_PPC64) + case POWERPC_MMU_64B: + case POWERPC_MMU_2_03: + case POWERPC_MMU_2_06: + case POWERPC_MMU_2_07: + ret = ppc_hash64_handle_mmu_fault(cpu, addr, access_type, mmu_idx); + break; + case POWERPC_MMU_3_00: + ret = ppc64_v3_handle_mmu_fault(cpu, addr, access_type, mmu_idx); + break; +#endif + + case POWERPC_MMU_32B: + case POWERPC_MMU_601: + ret = ppc_hash32_handle_mmu_fault(cpu, addr, access_type, mmu_idx); + break; + + default: ret = cpu_ppc_handle_mmu_fault(env, addr, access_type, mmu_idx); + break; } if (unlikely(ret != 0)) { if (probe) {