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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id h20sm2242022pfh.24.2021.06.14.01.38.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Jun 2021 01:38:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 21/28] target/arm: Improve vector REV Date: Mon, 14 Jun 2021 01:37:53 -0700 Message-Id: <20210614083800.1166166-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210614083800.1166166-1-richard.henderson@linaro.org> References: <20210614083800.1166166-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We can eliminate the requirement for a zero-extended output, because the following store will ignore any garbage high bits. Cc: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) -- 2.25.1 Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index ea9d2d4647..e12387e19c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -12427,12 +12427,10 @@ static void handle_rev(DisasContext *s, int opcode, bool u, read_vec_element(s, tcg_tmp, rn, i, grp_size); switch (grp_size) { case MO_16: - tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp, - TCG_BSWAP_IZ | TCG_BSWAP_OZ); + tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp, TCG_BSWAP_IZ); break; case MO_32: - tcg_gen_bswap32_i64(tcg_tmp, tcg_tmp, - TCG_BSWAP_IZ | TCG_BSWAP_OZ); + tcg_gen_bswap32_i64(tcg_tmp, tcg_tmp, TCG_BSWAP_IZ); break; case MO_64: tcg_gen_bswap64_i64(tcg_tmp, tcg_tmp);