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[189.204.200.163]) by smtp.gmail.com with ESMTPSA id p190sm5181972qke.13.2021.05.14.08.17.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 May 2021 08:17:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 48/50] target/i386: Create helper_check_io Date: Fri, 14 May 2021 10:13:40 -0500 Message-Id: <20210514151342.384376-49-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210514151342.384376-1-richard.henderson@linaro.org> References: <20210514151342.384376-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::82a; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, f4bug@amsat.org, ehabkost@redhat.com, cfontana@suse.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Drop helper_check_io[bwl] and expose their common subroutine to tcg directly. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/i386/helper.h | 4 +--- target/i386/tcg/seg_helper.c | 21 +++------------------ target/i386/tcg/translate.c | 14 +------------- 3 files changed, 5 insertions(+), 34 deletions(-) -- 2.25.1 Reviewed-by: Paolo Bonzini diff --git a/target/i386/helper.h b/target/i386/helper.h index 1d85f033df..47d0d67699 100644 --- a/target/i386/helper.h +++ b/target/i386/helper.h @@ -86,9 +86,7 @@ DEF_HELPER_1(rdtsc, void, env) DEF_HELPER_1(rdtscp, void, env) DEF_HELPER_FLAGS_1(rdpmc, TCG_CALL_NO_WG, noreturn, env) -DEF_HELPER_2(check_iob, void, env, i32) -DEF_HELPER_2(check_iow, void, env, i32) -DEF_HELPER_2(check_iol, void, env, i32) +DEF_HELPER_FLAGS_3(check_io, TCG_CALL_NO_WG, void, env, i32, i32) DEF_HELPER_3(outb, void, env, i32, i32) DEF_HELPER_2(inb, tl, env, i32) DEF_HELPER_3(outw, void, env, i32, i32) diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index cf3f051524..69d6e8f602 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -2418,10 +2418,10 @@ void helper_verw(CPUX86State *env, target_ulong selector1) } /* check if Port I/O is allowed in TSS */ -static inline void check_io(CPUX86State *env, int addr, int size, - uintptr_t retaddr) +void helper_check_io(CPUX86State *env, uint32_t addr, uint32_t size) { - int io_offset, val, mask; + uintptr_t retaddr = GETPC(); + uint32_t io_offset, val, mask; /* TSS must be a valid 32 bit one */ if (!(env->tr.flags & DESC_P_MASK) || @@ -2444,18 +2444,3 @@ static inline void check_io(CPUX86State *env, int addr, int size, raise_exception_err_ra(env, EXCP0D_GPF, 0, retaddr); } } - -void helper_check_iob(CPUX86State *env, uint32_t t0) -{ - check_io(env, t0, 1, GETPC()); -} - -void helper_check_iow(CPUX86State *env, uint32_t t0) -{ - check_io(env, t0, 2, GETPC()); -} - -void helper_check_iol(CPUX86State *env, uint32_t t0) -{ - check_io(env, t0, 4, GETPC()); -} diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 19bfdbd0a3..860c75c2b1 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -682,19 +682,7 @@ static bool gen_check_io(DisasContext *s, MemOp ot, TCGv_i32 port, uint32_t svm_flags) { if (PE(s) && (CPL(s) > IOPL(s) || VM86(s))) { - switch (ot) { - case MO_8: - gen_helper_check_iob(cpu_env, port); - break; - case MO_16: - gen_helper_check_iow(cpu_env, port); - break; - case MO_32: - gen_helper_check_iol(cpu_env, port); - break; - default: - tcg_abort(); - } + gen_helper_check_io(cpu_env, port, tcg_constant_i32(1 << ot)); } if (GUEST(s)) { target_ulong cur_eip = s->base.pc_next - s->cs_base;