Message ID | 20210512185441.3619828-7-matheus.ferst@eldorado.org.br |
---|---|
State | New |
Headers | show |
Series | [v4,01/31] target/ppc: Add cia field to DisasContext | expand |
On Wed, May 12, 2021 at 03:54:16PM -0300, matheus.ferst@eldorado.org.br wrote: > From: Richard Henderson <richard.henderson@linaro.org> > > Two of the call sites that use gen_debug_exception have already > updated NIP. Only ppc_tr_breakpoint_check requires the update. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Applied to ppc-for-6.1, thanks. > --- > target/ppc/translate.c | 15 ++------------- > 1 file changed, 2 insertions(+), 13 deletions(-) > > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 23de04a08e..7b23f85c11 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -326,19 +326,7 @@ static uint32_t gen_prep_dbgex(DisasContext *ctx) > > static void gen_debug_exception(DisasContext *ctx) > { > - TCGv_i32 t0; > - > - /* > - * These are all synchronous exceptions, we set the PC back to the > - * faulting instruction > - */ > - if ((ctx->exception != POWERPC_EXCP_BRANCH) && > - (ctx->exception != POWERPC_EXCP_SYNC)) { > - gen_update_nip(ctx, ctx->base.pc_next); > - } > - t0 = tcg_const_i32(EXCP_DEBUG); > - gen_helper_raise_exception(cpu_env, t0); > - tcg_temp_free_i32(t0); > + gen_helper_raise_exception(cpu_env, tcg_constant_i32(EXCP_DEBUG)); > ctx->base.is_jmp = DISAS_NORETURN; > } > > @@ -9377,6 +9365,7 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, > { > DisasContext *ctx = container_of(dcbase, DisasContext, base); > > + gen_update_nip(ctx, ctx->base.pc_next); > gen_debug_exception(ctx); > /* > * The address covered by the breakpoint must be included in -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 23de04a08e..7b23f85c11 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -326,19 +326,7 @@ static uint32_t gen_prep_dbgex(DisasContext *ctx) static void gen_debug_exception(DisasContext *ctx) { - TCGv_i32 t0; - - /* - * These are all synchronous exceptions, we set the PC back to the - * faulting instruction - */ - if ((ctx->exception != POWERPC_EXCP_BRANCH) && - (ctx->exception != POWERPC_EXCP_SYNC)) { - gen_update_nip(ctx, ctx->base.pc_next); - } - t0 = tcg_const_i32(EXCP_DEBUG); - gen_helper_raise_exception(cpu_env, t0); - tcg_temp_free_i32(t0); + gen_helper_raise_exception(cpu_env, tcg_constant_i32(EXCP_DEBUG)); ctx->base.is_jmp = DISAS_NORETURN; } @@ -9377,6 +9365,7 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, { DisasContext *ctx = container_of(dcbase, DisasContext, base); + gen_update_nip(ctx, ctx->base.pc_next); gen_debug_exception(ctx); /* * The address covered by the breakpoint must be included in