diff mbox series

[30/72] softfloat: Move pick_nan_muladd to softfloat-parts.c.inc

Message ID 20210508014802.892561-31-richard.henderson@linaro.org
State Superseded
Headers show
Series Convert floatx80 and float128 to FloatParts | expand

Commit Message

Richard Henderson May 8, 2021, 1:47 a.m. UTC 
At the same time, convert to pointers, rename to pick_nan_muladd$N
and define a macro for pick_nan_muladd using QEMU_GENERIC.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 fpu/softfloat.c           | 53 ++++++++++-----------------------------
 fpu/softfloat-parts.c.inc | 40 +++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+), 40 deletions(-)

-- 
2.25.1

Comments

David Hildenbrand May 12, 2021, 6:18 p.m. UTC | #1 
On 08.05.21 03:47, Richard Henderson wrote:
> At the same time, convert to pointers, rename to pick_nan_muladd$N

> and define a macro for pick_nan_muladd using QEMU_GENERIC.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>   fpu/softfloat.c           | 53 ++++++++++-----------------------------

>   fpu/softfloat-parts.c.inc | 40 +++++++++++++++++++++++++++++

>   2 files changed, 53 insertions(+), 40 deletions(-)

> 

> diff --git a/fpu/softfloat.c b/fpu/softfloat.c

> index 77efaedeaa..40ee294e35 100644

> --- a/fpu/softfloat.c

> +++ b/fpu/softfloat.c

> @@ -720,6 +720,18 @@ static FloatParts128 *parts128_pick_nan(FloatParts128 *a, FloatParts128 *b,

>   

>   #define parts_pick_nan(A, B, S)    PARTS_GENERIC_64_128(pick_nan, A)(A, B, S)

>   

> +static FloatParts64 *parts64_pick_nan_muladd(FloatParts64 *a, FloatParts64 *b,

> +                                             FloatParts64 *c, float_status *s,

> +                                             int ab_mask, int abc_mask);

> +static FloatParts128 *parts128_pick_nan_muladd(FloatParts128 *a,

> +                                               FloatParts128 *b,

> +                                               FloatParts128 *c,

> +                                               float_status *s,

> +                                               int ab_mask, int abc_mask);

> +

> +#define parts_pick_nan_muladd(A, B, C, S, ABM, ABCM) \

> +    PARTS_GENERIC_64_128(pick_nan_muladd, A)(A, B, C, S, ABM, ABCM)

> +

>   /*

>    * Helper functions for softfloat-parts.c.inc, per-size operations.

>    */

> @@ -947,45 +959,6 @@ static FloatParts64 round_canonical(FloatParts64 p, float_status *s,

>       return p;

>   }

>   

> -static FloatParts64 pick_nan_muladd(FloatParts64 a, FloatParts64 b, FloatParts64 c,

> -                                  bool inf_zero, float_status *s)

> -{

> -    int which;

> -

> -    if (is_snan(a.cls) || is_snan(b.cls) || is_snan(c.cls)) {

> -        float_raise(float_flag_invalid, s);

> -    }

> -

> -    which = pickNaNMulAdd(a.cls, b.cls, c.cls, inf_zero, s);

> -

> -    if (s->default_nan_mode) {

> -        /* Note that this check is after pickNaNMulAdd so that function

> -         * has an opportunity to set the Invalid flag.

> -         */

> -        which = 3;

> -    }

> -

> -    switch (which) {

> -    case 0:

> -        break;

> -    case 1:

> -        a = b;

> -        break;

> -    case 2:

> -        a = c;

> -        break;

> -    case 3:

> -        parts_default_nan(&a, s);

> -        break;

> -    default:

> -        g_assert_not_reached();

> -    }

> -

> -    if (is_snan(a.cls)) {

> -        parts_silence_nan(&a, s);

> -    }

> -    return a;

> -}

>   

>   #define partsN(NAME)   parts64_##NAME

>   #define FloatPartsN    FloatParts64

> @@ -1496,7 +1469,7 @@ static FloatParts64 muladd_floats(FloatParts64 a, FloatParts64 b, FloatParts64 c

>        * off to the target-specific pick-a-NaN routine.

>        */

>       if (unlikely(abc_mask & float_cmask_anynan)) {

> -        return pick_nan_muladd(a, b, c, inf_zero, s);

> +        return *parts_pick_nan_muladd(&a, &b, &c, s, ab_mask, abc_mask);

>       }

>   

>       if (inf_zero) {

> diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc

> index 11a71650f7..a78d61ea07 100644

> --- a/fpu/softfloat-parts.c.inc

> +++ b/fpu/softfloat-parts.c.inc

> @@ -60,3 +60,43 @@ static FloatPartsN *partsN(pick_nan)(FloatPartsN *a, FloatPartsN *b,

>       }

>       return a;

>   }

> +

> +static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN *a, FloatPartsN *b,

> +                                            FloatPartsN *c, float_status *s,

> +                                            int ab_mask, int abc_mask)

> +{

> +    int which;

> +

> +    if (unlikely(abc_mask & float_cmask_snan)) {

> +        float_raise(float_flag_invalid, s);

> +    }

> +

> +    which = pickNaNMulAdd(a->cls, b->cls, c->cls,

> +                          ab_mask == float_cmask_infzero, s);

> +

> +    if (s->default_nan_mode || which == 3) {

> +        /*

> +         * Note that this check is after pickNaNMulAdd so that function

> +         * has an opportunity to set the Invalid flag for infzero.

> +         */

> +        parts_default_nan(a, s);

> +        return a;

> +    }

> +

> +    switch (which) {

> +    case 0:

> +        break;

> +    case 1:

> +        a = b;

> +        break;

> +    case 2:

> +        a = c;

> +        break;

> +    default:

> +        g_assert_not_reached();

> +    }

> +    if (is_snan(a->cls)) {

> +        parts_silence_nan(a, s);

> +    }

> +    return a;

> +}

> 


Reviewed-by: David Hildenbrand <david@redhat.com>


-- 
Thanks,

David / dhildenb
diff mbox series

Patch

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 77efaedeaa..40ee294e35 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -720,6 +720,18 @@  static FloatParts128 *parts128_pick_nan(FloatParts128 *a, FloatParts128 *b,
 
 #define parts_pick_nan(A, B, S)    PARTS_GENERIC_64_128(pick_nan, A)(A, B, S)
 
+static FloatParts64 *parts64_pick_nan_muladd(FloatParts64 *a, FloatParts64 *b,
+                                             FloatParts64 *c, float_status *s,
+                                             int ab_mask, int abc_mask);
+static FloatParts128 *parts128_pick_nan_muladd(FloatParts128 *a,
+                                               FloatParts128 *b,
+                                               FloatParts128 *c,
+                                               float_status *s,
+                                               int ab_mask, int abc_mask);
+
+#define parts_pick_nan_muladd(A, B, C, S, ABM, ABCM) \
+    PARTS_GENERIC_64_128(pick_nan_muladd, A)(A, B, C, S, ABM, ABCM)
+
 /*
  * Helper functions for softfloat-parts.c.inc, per-size operations.
  */
@@ -947,45 +959,6 @@  static FloatParts64 round_canonical(FloatParts64 p, float_status *s,
     return p;
 }
 
-static FloatParts64 pick_nan_muladd(FloatParts64 a, FloatParts64 b, FloatParts64 c,
-                                  bool inf_zero, float_status *s)
-{
-    int which;
-
-    if (is_snan(a.cls) || is_snan(b.cls) || is_snan(c.cls)) {
-        float_raise(float_flag_invalid, s);
-    }
-
-    which = pickNaNMulAdd(a.cls, b.cls, c.cls, inf_zero, s);
-
-    if (s->default_nan_mode) {
-        /* Note that this check is after pickNaNMulAdd so that function
-         * has an opportunity to set the Invalid flag.
-         */
-        which = 3;
-    }
-
-    switch (which) {
-    case 0:
-        break;
-    case 1:
-        a = b;
-        break;
-    case 2:
-        a = c;
-        break;
-    case 3:
-        parts_default_nan(&a, s);
-        break;
-    default:
-        g_assert_not_reached();
-    }
-
-    if (is_snan(a.cls)) {
-        parts_silence_nan(&a, s);
-    }
-    return a;
-}
 
 #define partsN(NAME)   parts64_##NAME
 #define FloatPartsN    FloatParts64
@@ -1496,7 +1469,7 @@  static FloatParts64 muladd_floats(FloatParts64 a, FloatParts64 b, FloatParts64 c
      * off to the target-specific pick-a-NaN routine.
      */
     if (unlikely(abc_mask & float_cmask_anynan)) {
-        return pick_nan_muladd(a, b, c, inf_zero, s);
+        return *parts_pick_nan_muladd(&a, &b, &c, s, ab_mask, abc_mask);
     }
 
     if (inf_zero) {
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc
index 11a71650f7..a78d61ea07 100644
--- a/fpu/softfloat-parts.c.inc
+++ b/fpu/softfloat-parts.c.inc
@@ -60,3 +60,43 @@  static FloatPartsN *partsN(pick_nan)(FloatPartsN *a, FloatPartsN *b,
     }
     return a;
 }
+
+static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN *a, FloatPartsN *b,
+                                            FloatPartsN *c, float_status *s,
+                                            int ab_mask, int abc_mask)
+{
+    int which;
+
+    if (unlikely(abc_mask & float_cmask_snan)) {
+        float_raise(float_flag_invalid, s);
+    }
+
+    which = pickNaNMulAdd(a->cls, b->cls, c->cls,
+                          ab_mask == float_cmask_infzero, s);
+
+    if (s->default_nan_mode || which == 3) {
+        /*
+         * Note that this check is after pickNaNMulAdd so that function
+         * has an opportunity to set the Invalid flag for infzero.
+         */
+        parts_default_nan(a, s);
+        return a;
+    }
+
+    switch (which) {
+    case 0:
+        break;
+    case 1:
+        a = b;
+        break;
+    case 2:
+        a = c;
+        break;
+    default:
+        g_assert_not_reached();
+    }
+    if (is_snan(a->cls)) {
+        parts_silence_nan(a, s);
+    }
+    return a;
+}