diff mbox series

[v3,26/30] target/ppc: Implement PNOP

Message ID 20210430011543.1017113-27-richard.henderson@linaro.org
State New
Headers show
Series Base for adding PowerPC 64-bit instructions | expand

Commit Message

Richard Henderson April 30, 2021, 1:15 a.m. UTC
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/ppc/insn32.decode                   |  2 ++
 target/ppc/insn64.decode                   | 11 +++++++++++
 target/ppc/translate/fixedpoint-impl.c.inc |  5 +++++
 3 files changed, 18 insertions(+)

-- 
2.25.1

Comments

Philippe Mathieu-Daudé May 3, 2021, 10:41 p.m. UTC | #1
On 4/30/21 3:15 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/ppc/insn32.decode                   |  2 ++

>  target/ppc/insn64.decode                   | 11 +++++++++++

>  target/ppc/translate/fixedpoint-impl.c.inc |  5 +++++

>  3 files changed, 18 insertions(+)

> 

> diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode

> index 52d9b355d4..2ed25c7e67 100644

> --- a/target/ppc/insn32.decode

> +++ b/target/ppc/insn32.decode

> @@ -17,6 +17,8 @@

>  # License along with this library; if not, see <http://www.gnu.org/licenses/>.

>  #

>  

> +&empty

> +


> +static bool trans_NOP(DisasContext *ctx, arg_NOP *a)


Matter of taste, I'd rather use 'arg_empty'.

> +{

> +    return true;

> +}

> 


Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
diff mbox series

Patch

diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 52d9b355d4..2ed25c7e67 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -17,6 +17,8 @@ 
 # License along with this library; if not, see <http://www.gnu.org/licenses/>.
 #
 
+&empty
+
 &D              rt ra si
 @D              ...... rt:5 ra:5 si:s16                 &D
 
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index f4272df724..5a82ce375e 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -20,6 +20,8 @@ 
 # Many all of these instruction names would be prefixed by "P",
 # but we share code with the non-prefixed instruction.
 
+&empty          !extern
+
 # Format MLS:D and 8LS:D
 &PLS_D          rt ra si:int64_t r:bool  !extern
 %pls_si         32:s18 0:16
@@ -31,3 +33,12 @@ 
 
 ADDI            000001 10 0--.-- ..................     \
                 001110 ..... ..... ................     @PLS_D
+
+### Prefixed No-operation Instruction
+
+# TODO: diagnose the set of patterns that are illegal:
+# branches, rfebb, sync other than isync, or a service processor attention.
+# The Engineering Note allows us to either diagnose these as illegal,
+# or treat them all as no-op.
+NOP             000001 11 0000-- 000000000000000000     \
+                --------------------------------
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc
index 7af1b3bcf5..96b8c38f60 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -55,3 +55,8 @@  static bool trans_ADDIS(DisasContext *ctx, arg_D *a)
     }
     return true;
 }
+
+static bool trans_NOP(DisasContext *ctx, arg_NOP *a)
+{
+    return true;
+}