From patchwork Fri Apr 16 21:01:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 422600 Delivered-To: patch@linaro.org Received: by 2002:a02:6a6f:0:0:0:0:0 with SMTP id m47csp723348jaf; Fri, 16 Apr 2021 14:12:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzqraAxiGdTM6Nx8a02QLluVP0h5tdlH9qHfJuNUZJOd0czGhPyQ7R+SpbBpFiHxH4cl00J X-Received: by 2002:aca:4e56:: with SMTP id c83mr7800792oib.166.1618607534141; Fri, 16 Apr 2021 14:12:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618607534; cv=none; d=google.com; s=arc-20160816; b=rwP/5Ba6tQI9v05jIVvAk9pXDKM0t2UnulbAisz/vD3vCT7DNPvcvjmrHV37gOI/a6 zAhYDGsayRBuqZ8QJ5BTAf8BMZLT6cgIUhvude28eNi1MX5aWNsgET0NUVJkJIiLlmRF GRcY7W6Qapx6NmSqyxEYfVQ9HIjVbmz8W3gRDiJQw38oZe7nFCWxJvuHE3HLHcv+FXI8 kgpmSnSHk/zAdky3smE9MAbywzz1cYWi9dmfKnp6Re+7/izDHdkpC0oPyDrnd6VXirV4 VXgnV40UjugHaiyyLzQ7uKvwUgoy3eFBWY5VSIq6B95VtZrFRK64+l6jIKiG1mht7Hbp o/xQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=KjnryLyEOHY0qpMOVIlDWjkao3wWlEhJ3Rqkl3sc8kg=; b=a0TqCtBWiPKYv/sOotfz1Z21S0LWmZbxZJIlwVEF3q8IY/PFm3KffwSWlyGooxT1sF rTCqvbp4Z7m9PpZz/a9hv9RdpZpYil8Q3FYmJ6+AGOBTAqlSK+YnYmvbw0unk/7rkyZ4 xqSswkLPpD+wawag6pQeQpGVRCdeyCX35jblxOO4HEhU8x+zyE7okUJFbHrH/OQGC1Ls NlnACyVb/+Y4FwhSThZ8bK0CKzNg/lb0qBcEg2Lo5DA52t7CUrLG0RY+XQhrb9cxDBJW cMLmOUzCfIyGsSkPAuWtkf6TE3zZbVxt4XSgO4P+u0RlW6G2XHkz5t5Sw9PnD9GxZkDS PXLw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="kOd/CTO5"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id i21si8618613otj.220.2021.04.16.14.12.14 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Apr 2021 14:12:14 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="kOd/CTO5"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41962 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lXVl7-0007zm-HL for patch@linaro.org; Fri, 16 Apr 2021 17:12:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43872) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lXVcM-0004LM-1u for qemu-devel@nongnu.org; Fri, 16 Apr 2021 17:03:10 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]:51042) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lXVcG-0001AW-Jz for qemu-devel@nongnu.org; Fri, 16 Apr 2021 17:03:09 -0400 Received: by mail-pj1-x102e.google.com with SMTP id u11so11009943pjr.0 for ; Fri, 16 Apr 2021 14:03:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KjnryLyEOHY0qpMOVIlDWjkao3wWlEhJ3Rqkl3sc8kg=; b=kOd/CTO5zXQ4xCyhMCXXbMP32T39BI/fF9VisOt/gxNDXGVIqPcVXSiRXyvTU3Xwkz g3yzSU3QpNTRXWKUPV6b6IXk9UPvlyrF4MuTw4bfdojODoD7+BqQQ0F6Y0QeBx3tlo8Y lroNMS1cZpOkCH3iGD2PrsvOU4jscIiSsTVpcxPWeoBDVyEVS5DYB2KpXGSvTtjqrBHo u76AUkcvZoR5BN6FRTObPy34fCNfTPW5l5VNgAYfgr6pb1VmSh/P1Vm5/kcUlmyxX18e 6jzvrlOHOc6SiLzbPCapQWRI1Q6RXtvVX1uCHHtm5YRQRei/vB0JOAOCcgeyIJlnZaDE BS+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KjnryLyEOHY0qpMOVIlDWjkao3wWlEhJ3Rqkl3sc8kg=; b=IPHbeNNoliW/4rx101t9qQIbV6waAEh4We/NGHEBDYXRAxKUMAbKIeeHyfqbd1eXwj 0tO/Rsm0xitRK0qe7x7D6L797gznuaj3Fw6QN/jSFd4cWne91p7nhK/skms4Ewi2izHY HnjMmHXOC99lrI/JjjgIiWj+i573gE79L71+lkK9l7YqcryfZo1gTA0akoOSqW3VW2cA Dgf7HKH8/doUGvExBz3WCFHwl5BaIbhmaJwsFQqECkwJKFEm97JonrATh8A4DlmnGgHR RgUdz+dEjpYuuH2tFeJe9IqVn6IW6+WhSRFbhTU0i8OsDqVdoEpdkHZO8aZdVwS+mNBN z23Q== X-Gm-Message-State: AOAM530ikU9GGDOjUVKQDH+8qUJ3DOXI3YRCI3GysoCVnNy/cFo0xIM7 3F8Sr6pdX3Ubi+tuOqxE7AifmL8PUhsKOA== X-Received: by 2002:a17:902:b60d:b029:e6:7a9:7f4 with SMTP id b13-20020a170902b60db02900e607a907f4mr11498703pls.3.1618606983272; Fri, 16 Apr 2021 14:03:03 -0700 (PDT) Received: from localhost.localdomain ([71.212.131.83]) by smtp.gmail.com with ESMTPSA id m15sm5920640pjz.36.2021.04.16.14.03.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Apr 2021 14:03:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 21/81] target/arm: Implement SVE2 bitwise shift right and accumulate Date: Fri, 16 Apr 2021 14:01:40 -0700 Message-Id: <20210416210240.1591291-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210416210240.1591291-1-richard.henderson@linaro.org> References: <20210416210240.1591291-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/arm/sve.decode | 8 ++++++++ target/arm/translate-sve.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) -- 2.25.1 diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 79046d81e3..d3c4ec6dd1 100644 --- a/target/arm/sve.decode +++ b/target/arm/sve.decode @@ -1253,3 +1253,11 @@ UABALT 01000101 .. 0 ..... 1100 11 ..... ..... @rda_rn_rm # ADC and SBC decoded via size in helper dispatch. ADCLB 01000101 .. 0 ..... 11010 0 ..... ..... @rda_rn_rm ADCLT 01000101 .. 0 ..... 11010 1 ..... ..... @rda_rn_rm + +## SVE2 bitwise shift right and accumulate + +# TODO: Use @rda and %reg_movprfx here. +SSRA 01000101 .. 0 ..... 1110 00 ..... ..... @rd_rn_tszimm_shr +USRA 01000101 .. 0 ..... 1110 01 ..... ..... @rd_rn_tszimm_shr +SRSRA 01000101 .. 0 ..... 1110 10 ..... ..... @rd_rn_tszimm_shr +URSRA 01000101 .. 0 ..... 1110 11 ..... ..... @rd_rn_tszimm_shr diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 6f5e39b741..c11074cccc 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -6394,3 +6394,37 @@ static bool trans_ADCLT(DisasContext *s, arg_rrrr_esz *a) { return do_adcl(s, a, true); } + +static bool do_sve2_fn2i(DisasContext *s, arg_rri_esz *a, GVecGen2iFn *fn) +{ + if (a->esz < 0 || !dc_isar_feature(aa64_sve2, s)) { + return false; + } + if (sve_access_check(s)) { + unsigned vsz = vec_full_reg_size(s); + unsigned rd_ofs = vec_full_reg_offset(s, a->rd); + unsigned rn_ofs = vec_full_reg_offset(s, a->rn); + fn(a->esz, rd_ofs, rn_ofs, a->imm, vsz, vsz); + } + return true; +} + +static bool trans_SSRA(DisasContext *s, arg_rri_esz *a) +{ + return do_sve2_fn2i(s, a, gen_gvec_ssra); +} + +static bool trans_USRA(DisasContext *s, arg_rri_esz *a) +{ + return do_sve2_fn2i(s, a, gen_gvec_usra); +} + +static bool trans_SRSRA(DisasContext *s, arg_rri_esz *a) +{ + return do_sve2_fn2i(s, a, gen_gvec_srsra); +} + +static bool trans_URSRA(DisasContext *s, arg_rri_esz *a) +{ + return do_sve2_fn2i(s, a, gen_gvec_ursra); +}