From patchwork Fri Apr 16 18:59:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 422580 Delivered-To: patch@linaro.org Received: by 2002:a02:6a6f:0:0:0:0:0 with SMTP id m47csp657555jaf; Fri, 16 Apr 2021 12:17:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwsatC4THwftyLJmvjwb4/MawQ+ciT2y7a3aVs1ozxijl9K6ega7IUqmR0diWYy7wmwygK0 X-Received: by 2002:a05:6e02:e0a:: with SMTP id a10mr7945142ilk.271.1618600663482; Fri, 16 Apr 2021 12:17:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618600663; cv=none; d=google.com; s=arc-20160816; b=m2UvI1f0LxbEHZBVs02fS3Lmlqs/edc9Vz4C7nje4kCezG4lzEnO6A/mJ4c+Ij+cRo PhU9jOu8n4L2o9GWjCudlKuST/HuZux5+zmvJxzhY+jH189mYUhTPfjZSM2lt9p0xpru c1eeut9MN2QuK5RXtqLoSUgyKQxF3gPGmvRVjU8go5vFphP7CybSu9v9ZvKpluCZPiT2 ZWrMZ1groDLU5BreWF3B7GM6m6iJwchEWX4OE6eBWTJFVrPUNlkUEpizYgJ3WnAzf3Zc khoOb7Gp7k1EcNEdqp63wjWTMtZ1bOTRrQxEXp9Wa41lxkP16Vs/8NkdFegx0AH2Yrye yCpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=kFpRdpzIBHPgybwqUXYjnSl/F8QbD35R7VDxiD3dIh0=; b=kM0UOQf095yUwLJpAxgnPzHPJBOI5BGHKuIBJqz6x8GaKHW530HF7iHu0aFSqhNYbn Jr8shywNhudBo9ZfHzh5Qq8lXaIMru0MiCQq9wfIUXBAPXP1HYlkRMuqQ0DDxfDXAX7B gx7fxqvLdXUnYpg682sW85kip0pTHzILVsiVraZvZZEo0VuYwo/x62UlycLqZsNZgH17 usjSUzWKQXv94qSikZD0JzJPEtZZiEVzeXAtbCTeMCgwMX+6qdoWqE54oMrQ/CLOaBfe ab0WifODQayObqK58isW+BGJ3oBOQHPcTp8Y6MkWUPyaelw/R7pHSsoR2INL/YJBZZ4R bVbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dK5vU8r1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o2si3999447iop.0.2021.04.16.12.17.43 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Apr 2021 12:17:43 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dK5vU8r1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:57666 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lXTyJ-0001CW-0E for patch@linaro.org; Fri, 16 Apr 2021 15:17:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50514) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lXTht-00040X-Ae for qemu-devel@nongnu.org; Fri, 16 Apr 2021 15:00:47 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]:39523) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lXThY-0004S3-2M for qemu-devel@nongnu.org; Fri, 16 Apr 2021 15:00:44 -0400 Received: by mail-pl1-x631.google.com with SMTP id u7so12665431plr.6 for ; Fri, 16 Apr 2021 12:00:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kFpRdpzIBHPgybwqUXYjnSl/F8QbD35R7VDxiD3dIh0=; b=dK5vU8r1ytZLQgQHxf64w+EzZze2eOmH3UjyvumWGf8cu/yaxjnwhMMcHQKcS6jQu9 u6hkDNzWT3PF+2SoPdk62aU9r1gGQcyUYACA2A+lnQ3u9AIkToSqYoF30+tNn3zS1bsy T1R67UDMo6s2bzirTriAzvDCtkgWif2aU+A/CC3+VyWS2TFAHKiR2Y6AYxcCUU+y9PiC tN/JzDIn8dQjXdbACGIv0stCwI0eAZNbbMcGcnQtKVqb6eRjM5YoNB/y2Ue4YPCD4Qi/ 1Hp90ulhZJudoIEWDAJJ2tQ73uhmRgeyLsXXSV9Qs26dLCwTNITJws7xhI9kkjy2hplG FxKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kFpRdpzIBHPgybwqUXYjnSl/F8QbD35R7VDxiD3dIh0=; b=l2ub08+eLbTAEo1S2Vn1i4/HR+MyuEpUDo365WrttgTSEUvM/pBygdXq1H1zKuc5ps 0MWoH+FDQBz/pvP7bKu5uuCgZnGvwb+mZVYR40KaKOls1u8r+vZQVkx3QMxU+eFJLGia gOaA98jmIqdbq34032ThCR+bDQeAv0b9/2TxA57IPez13E+Dzrg7GGSCo+90w4nNGCpg jTZa6qu1BO5UHhnPuXB3By15fWPVguXVU7NKAsiMLxtxBnbyTa25y4Z9s5m4YeINHg2O yzNfz10LFwyqB8X/KgfdBGJgIGlmdfFC/SZJQ5CZMj2ioCnzUcWmdzKP0aYpDBqY0Cqy 6T+A== X-Gm-Message-State: AOAM531Us1xv20bAIw5zMPUTk5C4EuwYBRLDHCMSh3xfKdQMZ1seN/o3 Kt/oAs+8XMPW1VNyVuNHQMIf8+1RalYWDA== X-Received: by 2002:a17:90a:5b0b:: with SMTP id o11mr11186341pji.18.1618599622561; Fri, 16 Apr 2021 12:00:22 -0700 (PDT) Received: from localhost.localdomain ([71.212.131.83]) by smtp.gmail.com with ESMTPSA id d7sm1988337pfv.197.2021.04.16.12.00.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Apr 2021 12:00:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 22/30] target/arm: Enforce alignment for VLDn/VSTn (multiple) Date: Fri, 16 Apr 2021 11:59:51 -0700 Message-Id: <20210416185959.1520974-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210416185959.1520974-1-richard.henderson@linaro.org> References: <20210416185959.1520974-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/translate-neon.c.inc | 27 ++++++++++++++++++++++----- 1 file changed, 22 insertions(+), 5 deletions(-) -- 2.25.1 diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc index 9c2b076027..e706c37c80 100644 --- a/target/arm/translate-neon.c.inc +++ b/target/arm/translate-neon.c.inc @@ -429,7 +429,7 @@ static bool trans_VLDST_multiple(DisasContext *s, arg_VLDST_multiple *a) { /* Neon load/store multiple structures */ int nregs, interleave, spacing, reg, n; - MemOp endian = s->be_data; + MemOp mop, align, endian; int mmu_idx = get_mem_index(s); int size = a->size; TCGv_i64 tmp64; @@ -473,20 +473,36 @@ static bool trans_VLDST_multiple(DisasContext *s, arg_VLDST_multiple *a) } /* For our purposes, bytes are always little-endian. */ + endian = s->be_data; if (size == 0) { endian = MO_LE; } + + /* Enforce alignment requested by the instruction */ + if (a->align) { + align = pow2_align(a->align + 2); /* 4 ** a->align */ + } else { + align = s->align_mem ? MO_ALIGN : 0; + } + /* * Consecutive little-endian elements from a single register * can be promoted to a larger little-endian operation. */ if (interleave == 1 && endian == MO_LE) { + /* Retain any natural alignment. */ + if (align == MO_ALIGN) { + align = pow2_align(size); + } size = 3; } + tmp64 = tcg_temp_new_i64(); addr = tcg_temp_new_i32(); tmp = tcg_const_i32(1 << size); load_reg_var(s, addr, a->rn); + + mop = endian | size | align; for (reg = 0; reg < nregs; reg++) { for (n = 0; n < 8 >> size; n++) { int xs; @@ -494,15 +510,16 @@ static bool trans_VLDST_multiple(DisasContext *s, arg_VLDST_multiple *a) int tt = a->vd + reg + spacing * xs; if (a->l) { - gen_aa32_ld_internal_i64(s, tmp64, addr, mmu_idx, - endian | size); + gen_aa32_ld_internal_i64(s, tmp64, addr, mmu_idx, mop); neon_store_element64(tt, n, size, tmp64); } else { neon_load_element64(tmp64, tt, n, size); - gen_aa32_st_internal_i64(s, tmp64, addr, mmu_idx, - endian | size); + gen_aa32_st_internal_i64(s, tmp64, addr, mmu_idx, mop); } tcg_gen_add_i32(addr, addr, tmp); + + /* Subsequent memory operations inherit alignment */ + mop &= ~MO_AMASK; } } }