diff mbox series

[v5,06/57] tcg/tci: Split out tci_args_rrrc

Message ID 20210311143958.562625-7-richard.henderson@linaro.org
State Superseded
Headers show
Series TCI fixes and cleanups | expand

Commit Message

Richard Henderson March 11, 2021, 2:39 p.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/tci.c | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)

-- 
2.25.1

Comments

Philippe Mathieu-Daudé March 16, 2021, 10:55 p.m. UTC | #1 
On 3/11/21 3:39 PM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  tcg/tci.c | 23 +++++++++++++----------

>  1 file changed, 13 insertions(+), 10 deletions(-)

> 

> diff --git a/tcg/tci.c b/tcg/tci.c

> index 1c879a2536..bdd2127ec8 100644

> --- a/tcg/tci.c

> +++ b/tcg/tci.c

> @@ -207,6 +207,15 @@ static void tci_args_rrs(const uint8_t **tb_ptr,

>      *i2 = tci_read_s32(tb_ptr);

>  }

>  

> +static void tci_args_rrrc(const uint8_t **tb_ptr,

> +                          TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3)

> +{

> +    *r0 = tci_read_r(tb_ptr);

> +    *r1 = tci_read_r(tb_ptr);

> +    *r2 = tci_read_r(tb_ptr);

> +    *c3 = tci_read_b(tb_ptr);

> +}


Can you describe 'c -> cond' in the previous comment?

Otherwise:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
diff mbox series

Patch

diff --git a/tcg/tci.c b/tcg/tci.c
index 1c879a2536..bdd2127ec8 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -207,6 +207,15 @@  static void tci_args_rrs(const uint8_t **tb_ptr,
     *i2 = tci_read_s32(tb_ptr);
 }
 
+static void tci_args_rrrc(const uint8_t **tb_ptr,
+                          TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3)
+{
+    *r0 = tci_read_r(tb_ptr);
+    *r1 = tci_read_r(tb_ptr);
+    *r2 = tci_read_r(tb_ptr);
+    *c3 = tci_read_b(tb_ptr);
+}
+
 static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition)
 {
     bool result = false;
@@ -413,11 +422,8 @@  uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
             tb_ptr = (uint8_t *)label;
             continue;
         case INDEX_op_setcond_i32:
-            t0 = *tb_ptr++;
-            t1 = tci_read_rval(regs, &tb_ptr);
-            t2 = tci_read_rval(regs, &tb_ptr);
-            condition = *tb_ptr++;
-            tci_write_reg(regs, t0, tci_compare32(t1, t2, condition));
+            tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition);
+            regs[r0] = tci_compare32(regs[r1], regs[r2], condition);
             break;
 #if TCG_TARGET_REG_BITS == 32
         case INDEX_op_setcond2_i32:
@@ -429,11 +435,8 @@  uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
             break;
 #elif TCG_TARGET_REG_BITS == 64
         case INDEX_op_setcond_i64:
-            t0 = *tb_ptr++;
-            t1 = tci_read_rval(regs, &tb_ptr);
-            t2 = tci_read_rval(regs, &tb_ptr);
-            condition = *tb_ptr++;
-            tci_write_reg(regs, t0, tci_compare64(t1, t2, condition));
+            tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition);
+            regs[r0] = tci_compare64(regs[r1], regs[r2], condition);
             break;
 #endif
         CASE_32_64(mov)