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[187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 38/57] tcg/tci: Split out tcg_out_op_rrrrcl Date: Thu, 11 Mar 2021 08:39:39 -0600 Message-Id: <20210311143958.562625-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::f2b; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.c.inc | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) -- 2.25.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index c2bbd85130..fb4aacaca3 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -399,6 +399,23 @@ static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op, old_code_ptr[1] = s->code_ptr - old_code_ptr; } +static void tcg_out_op_rrrrcl(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, + TCGCond c4, TCGLabel *l5) +{ + uint8_t *old_code_ptr = s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out_r(s, r3); + tcg_out8(s, c4); + tci_out_label(s, l5); + + old_code_ptr[1] = s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4, TCGCond c5) @@ -636,14 +653,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, args[3], args[4], args[5]); break; case INDEX_op_brcond2_i32: - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out_r(s, args[3]); - tcg_out8(s, args[4]); /* condition */ - tci_out_label(s, arg_label(args[5])); - old_code_ptr[1] = s->code_ptr - old_code_ptr; + tcg_out_op_rrrrcl(s, opc, args[0], args[1], args[2], + args[3], args[4], arg_label(args[5])); break; case INDEX_op_mulu2_i32: tcg_out_op_rrrr(s, opc, args[0], args[1], args[2], args[3]);