diff mbox series

[v5,01/57] tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64

Message ID 20210311143958.562625-2-richard.henderson@linaro.org
State Superseded
Headers show
Series TCI fixes and cleanups | expand

Commit Message

Richard Henderson March 11, 2021, 2:39 p.m. UTC
These operations are always available under different names:
INDEX_op_ext_i32_i64 and INDEX_op_extu_i32_i64, so we remove
no code with the ifdef.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/tci.c | 4 ----
 1 file changed, 4 deletions(-)

-- 
2.25.1

Comments

Stefan Weil March 11, 2021, 4:05 p.m. UTC | #1
Am 11.03.21 um 15:39 schrieb Richard Henderson:

> These operations are always available under different names:

> INDEX_op_ext_i32_i64 and INDEX_op_extu_i32_i64, so we remove

> no code with the ifdef.



Is that really so? Depending on how the compiler implements the case 
statements, it either needs additional conditional statements (which 
require both code space and execution time) or larger jump tables 
(unless the table is filled anyway). Even if the compiler uses a binary 
search the time for searching will increase. Adding two more cases only 
has no effect on speed and memory if the compiler uses jump tables 
without holes.

Anyway, it would be good to get all these patches into master even if I 
have a different opinion on some details. Therefore

Reviewed-by: Stefan Weil <sw@weilnetz.de>



> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>   tcg/tci.c | 4 ----

>   1 file changed, 4 deletions(-)

>

> diff --git a/tcg/tci.c b/tcg/tci.c

> index 3ccd30c39c..6a0bdf028b 100644

> --- a/tcg/tci.c

> +++ b/tcg/tci.c

> @@ -774,17 +774,13 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,

>                   continue;

>               }

>               break;

> -#if TCG_TARGET_HAS_ext32s_i64

>           case INDEX_op_ext32s_i64:

> -#endif

>           case INDEX_op_ext_i32_i64:

>               t0 = *tb_ptr++;

>               t1 = tci_read_r(regs, &tb_ptr);

>               tci_write_reg(regs, t0, (int32_t)t1);

>               break;

> -#if TCG_TARGET_HAS_ext32u_i64

>           case INDEX_op_ext32u_i64:

> -#endif

>           case INDEX_op_extu_i32_i64:

>               t0 = *tb_ptr++;

>               t1 = tci_read_r(regs, &tb_ptr);
diff mbox series

Patch

diff --git a/tcg/tci.c b/tcg/tci.c
index 3ccd30c39c..6a0bdf028b 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -774,17 +774,13 @@  uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
                 continue;
             }
             break;
-#if TCG_TARGET_HAS_ext32s_i64
         case INDEX_op_ext32s_i64:
-#endif
         case INDEX_op_ext_i32_i64:
             t0 = *tb_ptr++;
             t1 = tci_read_r(regs, &tb_ptr);
             tci_write_reg(regs, t0, (int32_t)t1);
             break;
-#if TCG_TARGET_HAS_ext32u_i64
         case INDEX_op_ext32u_i64:
-#endif
         case INDEX_op_extu_i32_i64:
             t0 = *tb_ptr++;
             t1 = tci_read_r(regs, &tb_ptr);