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[187.189.51.144]) by smtp.gmail.com with ESMTPSA id a6sm300962otq.79.2021.03.10.16.22.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 16:22:23 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 20/26] tcg: Allocate code_gen_buffer into struct tcg_region_state Date: Wed, 10 Mar 2021 18:21:50 -0600 Message-Id: <20210311002156.253711-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311002156.253711-1-richard.henderson@linaro.org> References: <20210311002156.253711-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::329; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: r.bolshakov@yadro.com, j@getutm.app Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not mess around with setting values within tcg_init_ctx. Put the values into 'region' directly, which is where they will live for the lifetime of the program. Signed-off-by: Richard Henderson --- tcg/region.c | 61 ++++++++++++++++++++++------------------------------ 1 file changed, 26 insertions(+), 35 deletions(-) -- 2.25.1 diff --git a/tcg/region.c b/tcg/region.c index f719a3edf3..d7ad1be1f9 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -520,8 +520,8 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) } qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf; + region.total_size = size; return true; } #elif defined(_WIN32) @@ -542,8 +542,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) return false; } - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf; + region.total_size = size; return true; } #else @@ -558,7 +558,6 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, "allocate %zu bytes for jit buffer", size); return false; } - tcg_ctx->code_gen_buffer_size = size; #ifdef __mips__ if (cross_256mb(buf, size)) { @@ -596,7 +595,8 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, /* Request large pages for the buffer. */ qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - tcg_ctx->code_gen_buffer = buf; + region.start_aligned = buf; + region.total_size = size; return true; } @@ -617,8 +617,8 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) return false; } /* The size of the mapping may have been adjusted. */ - size = tcg_ctx->code_gen_buffer_size; - buf_rx = tcg_ctx->code_gen_buffer; + buf_rx = region.start_aligned; + size = region.total_size; #endif buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp); @@ -640,8 +640,8 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) #endif close(fd); - tcg_ctx->code_gen_buffer = buf_rw; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf_rw; + region.total_size = size; tcg_splitwx_diff = buf_rx - buf_rw; /* Request large pages for the buffer and the splitwx. */ @@ -692,7 +692,7 @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) return false; } - buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer; + buf_rw = region.start_aligned; buf_rx = 0; ret = mach_vm_remap(mach_task_self(), &buf_rx, @@ -804,11 +804,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) */ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { - void *buf, *aligned, *end; - size_t total_size; size_t page_size; size_t region_size; - size_t n_regions; size_t i; uintptr_t splitwx_diff; bool ok; @@ -817,39 +814,33 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) splitwx, &error_fatal); assert(ok); - buf = tcg_init_ctx.code_gen_buffer; - total_size = tcg_init_ctx.code_gen_buffer_size; - page_size = qemu_real_host_page_size; - n_regions = tcg_n_regions(total_size, max_cpus); - - /* The first region will be 'aligned - buf' bytes larger than the others */ - aligned = QEMU_ALIGN_PTR_UP(buf, page_size); - g_assert(aligned < tcg_init_ctx.code_gen_buffer + total_size); - /* * Make region_size a multiple of page_size, using aligned as the start. * As a result of this we might end up with a few extra pages at the end of * the buffer; we will assign those to the last region. */ - region_size = (total_size - (aligned - buf)) / n_regions; + region.n = tcg_n_regions(region.total_size, max_cpus); + page_size = qemu_real_host_page_size; + region_size = region.total_size / region.n; region_size = QEMU_ALIGN_DOWN(region_size, page_size); /* A region must have at least 2 pages; one code, one guard */ g_assert(region_size >= 2 * page_size); + region.stride = region_size; + + /* Reserve space for guard pages. */ + region.size = region_size - page_size; + region.total_size -= page_size; + + /* + * The first region will be smaller than the others, via the prologue, + * which has yet to be allocated. For now, the first region begins at + * the page boundary. + */ + region.start = region.start_aligned; /* init the region struct */ qemu_mutex_init(®ion.lock); - region.n = n_regions; - region.size = region_size - page_size; - region.stride = region_size; - region.start = buf; - region.start_aligned = aligned; - /* page-align the end, since its last page will be a guard page */ - end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size); - /* account for that last guard page */ - end -= page_size; - total_size = end - aligned; - region.total_size = total_size; /* set guard pages */ splitwx_diff = tcg_splitwx_diff;