From patchwork Mon Mar 8 13:50:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 395423 Delivered-To: patch@linaro.org Received: by 2002:a17:906:a383:0:0:0:0 with SMTP id k3csp1836300ejz; Mon, 8 Mar 2021 05:56:41 -0800 (PST) X-Google-Smtp-Source: ABdhPJzP2Fw67+uYFFTpeL5eWRw6mdL25e3j4pAa+11JohlEbinD4FLeKDpmqGPGR9g9J/GOonfh X-Received: by 2002:a5d:9d56:: with SMTP id k22mr18785789iok.145.1615211800914; Mon, 08 Mar 2021 05:56:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615211800; cv=none; d=google.com; s=arc-20160816; b=OToHGnKxn11tKfASSb0Rwr5z7v4PVUt7nYnavQORgMdlEtifEBwwXhe4HA3lZ0w0pl 6dSaswebi61v3F00LFRJhOOUiouYTTfR1XZF0LgyYiFoyy/CC+TpyuPDC8W3BvT6td5Z aKIueks2a2JBC9qQTfNifJguCpTOPeUUru6VHtYE7NgpJWfUkffj3L0p7UjWMzTPezNx vSf23Q6Vz5AEc4OUBdrM/kyj09ifgnhHUJ6C9VJ3W8EA1dTlmLQpYgN1g34Il95wYvo9 ax3rI3MT7MNDd2COWnafneVr3qXESfZ2hS4vgDF3wcUzHdFOPeGLYpQHZk5ED7JmEeyI x33A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=5ViVWtZ3No3EwiuLvapp181B6jvA1Zl37fC61JHK5PU=; b=FtO5ILtsIB0ZAFfF9EFPgjraEhvCsVPYE2K9laZY/af2JDR/2rqKvY0MmBp007Z3eK VukCoRZQVyTcYOAvm83frsvz/8q5AnL/Ut1qNYLNpqVskqd7j95BFadJBxkFObZaj9Er CHzIIM6aourtimqDh54Hrs5CL46uYSxkiVKTxSsqjQX6m5IUdXQmnmLcuKGyXEy+oAUq julu9rd+f1RbrPplKP61GE/o8qIE/TNFqy+Ch73tISpcWuz8WqHfF7XEJ7EIo0uYs0ps rE4QC5owlkQSUWo8m1xOPlbj4Vsojj2zlmbXEpqGUMrPb2VzNdPeY5bbHt7xZvl0v25y EVOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=TJORMraY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y23si10874591jai.77.2021.03.08.05.56.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 08 Mar 2021 05:56:40 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=TJORMraY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54404 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lJGNE-000554-4C for patch@linaro.org; Mon, 08 Mar 2021 08:56:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53624) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJGIA-0006bi-Nw for qemu-devel@nongnu.org; Mon, 08 Mar 2021 08:51:26 -0500 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]:54110) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lJGI5-0001Fw-5J for qemu-devel@nongnu.org; Mon, 08 Mar 2021 08:51:26 -0500 Received: by mail-wm1-x32b.google.com with SMTP id e23so6093509wmh.3 for ; Mon, 08 Mar 2021 05:51:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5ViVWtZ3No3EwiuLvapp181B6jvA1Zl37fC61JHK5PU=; b=TJORMraYWiV20w8qDxwleyRNVTbR0TIBeI94ghcyq8tlh79y0d4L7nwo/m3niOq40b hXKK7FhGpIhdRB7lomBs4Ho0ubfN2MUOCAzkymSbZPcQGPIGys3hUeX0WYRxKqdQVPqg pSqeLwW4OdDG5xCwE0ysa7Z9A0GiCxYS34KpTShrJeWuR0XmLxDqhw1PxK8F2fvBRbbw agelcXI94uSbi+BTHoZFP4O8sPC5BhN5AYPXjTpVq3U/cmpCzObRBDuQ6FEfSMBrjGSJ B15zYfWEIPmPQYFaq8XJKAdE9OAmANB/1RwOyIgx4UQ8mT0rR2ZVgOdc/Fbv31eF3mio g0GA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5ViVWtZ3No3EwiuLvapp181B6jvA1Zl37fC61JHK5PU=; b=erSIm/WI2Dfeq4eKY2B1XCoWTBZdcpTaz7ObdsSbNAzb3wh53ot9S+qJu/2poOooFT pmWDknUr+EecIVMSbCzDvWkCIuYmn5ZSm3jgTGBrz2oRx9Y7JnZYOxNTwrJyblUzIxRy zzZ2uliCELM4J1f8d80D4rxfR90UPpCy1o1IF/+QALf8rwG53xbJCjbIRpD1f4II8xNw rEjXCK5+V1a2/IhQCA+s15smKX8JaMTN7jMcbxqtny/Ri/ozSQq1sULV8x33l96hHD+O OZt8um09Zv9sXmB9UV8CR4z7ZIRPehgUrPMPPP3A8+QApXi18SnRE0AOOG56OnMLWtge 1eOQ== X-Gm-Message-State: AOAM533y21QtRUofJCG+ETELzwPg5PvPZEE0d/OJ2e3M4+F9pZfKy9Pd hYXe/ruI+BXuIYkyFtsYeG1jCA== X-Received: by 2002:a1c:195:: with SMTP id 143mr21688670wmb.81.1615211479644; Mon, 08 Mar 2021 05:51:19 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id k4sm23496842wrd.9.2021.03.08.05.51.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Mar 2021 05:51:17 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id D4BE61FF9A; Mon, 8 Mar 2021 13:51:05 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL 11/18] hw/riscv: migrate fdt field to generic MachineState Date: Mon, 8 Mar 2021 13:50:57 +0000 Message-Id: <20210308135104.24903-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210308135104.24903-1-alex.bennee@linaro.org> References: <20210308135104.24903-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V TCG CPUs" , Sagar Karandikar , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Alistair Francis , Bastian Koppelmann , Palmer Dabbelt , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is a mechanical change to make the fdt available through MachineState. Signed-off-by: Alex Bennée Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210303173642.3805-3-alex.bennee@linaro.org> -- 2.20.1 diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 84b7a3848f..632da52018 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -41,7 +41,6 @@ struct RISCVVirtState { DeviceState *plic[VIRT_SOCKETS_MAX]; PFlashCFI01 *flash[2]; - void *fdt; int fdt_size; }; diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4f0c2fbca0..0b39101a5e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -195,14 +195,14 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, hwaddr flashbase = virt_memmap[VIRT_FLASH].base; if (mc->dtb) { - fdt = s->fdt = load_device_tree(mc->dtb, &s->fdt_size); + fdt = mc->fdt = load_device_tree(mc->dtb, &s->fdt_size); if (!fdt) { error_report("load_device_tree() failed"); exit(1); } goto update_bootargs; } else { - fdt = s->fdt = create_device_tree(&s->fdt_size); + fdt = mc->fdt = create_device_tree(&s->fdt_size); if (!fdt) { error_report("create_device_tree() failed"); exit(1); @@ -444,12 +444,12 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, g_free(name); name = g_strdup_printf("/soc/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(s->fdt, name); - qemu_fdt_setprop_string(s->fdt, name, "compatible", "cfi-flash"); - qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", + qemu_fdt_add_subnode(mc->fdt, name); + qemu_fdt_setprop_string(mc->fdt, name, "compatible", "cfi-flash"); + qemu_fdt_setprop_sized_cells(mc->fdt, name, "reg", 2, flashbase, 2, flashsize, 2, flashbase + flashsize, 2, flashsize); - qemu_fdt_setprop_cell(s->fdt, name, "bank-width", 4); + qemu_fdt_setprop_cell(mc->fdt, name, "bank-width", 4); g_free(name); update_bootargs: @@ -667,9 +667,9 @@ static void virt_machine_init(MachineState *machine) hwaddr end = riscv_load_initrd(machine->initrd_filename, machine->ram_size, kernel_entry, &start); - qemu_fdt_setprop_cell(s->fdt, "/chosen", + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-start", start); - qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end", + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-end", end); } } else { @@ -690,12 +690,12 @@ static void virt_machine_init(MachineState *machine) /* Compute the fdt load address in dram */ fdt_load_addr = riscv_load_fdt(memmap[VIRT_DRAM].base, - machine->ram_size, s->fdt); + machine->ram_size, machine->fdt); /* load the reset vector */ riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, virt_memmap[VIRT_MROM].base, virt_memmap[VIRT_MROM].size, kernel_entry, - fdt_load_addr, s->fdt); + fdt_load_addr, machine->fdt); /* SiFive Test MMIO device */ sifive_test_create(memmap[VIRT_TEST].base);