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[47.51.160.125]) by smtp.gmail.com with ESMTPSA id c21sm3950355pgh.0.2021.02.17.15.40.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Feb 2021 15:40:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 13/35] Hexagon (target/hexagon) instruction attributes Date: Wed, 17 Feb 2021 15:40:01 -0800 Message-Id: <20210217234023.1742406-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210217234023.1742406-1-richard.henderson@linaro.org> References: <20210217234023.1742406-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Taylor Simpson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Taylor Simpson Signed-off-by: Taylor Simpson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <1612763186-18161-13-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson --- target/hexagon/attribs.h | 35 ++++++++++++ target/hexagon/attribs_def.h.inc | 97 ++++++++++++++++++++++++++++++++ 2 files changed, 132 insertions(+) create mode 100644 target/hexagon/attribs.h create mode 100644 target/hexagon/attribs_def.h.inc -- 2.25.1 diff --git a/target/hexagon/attribs.h b/target/hexagon/attribs.h new file mode 100644 index 0000000000..54576f4143 --- /dev/null +++ b/target/hexagon/attribs.h @@ -0,0 +1,35 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef HEXAGON_ATTRIBS_H +#define HEXAGON_ATTRIBS_H + +#include "qemu/bitmap.h" +#include "opcodes.h" + +enum { +#define DEF_ATTRIB(NAME, ...) A_##NAME, +#include "attribs_def.h.inc" +#undef DEF_ATTRIB +}; + +extern DECLARE_BITMAP(opcode_attribs[XX_LAST_OPCODE], A_ZZ_LASTATTRIB); + +#define GET_ATTRIB(opcode, attrib) \ + test_bit(attrib, opcode_attribs[opcode]) + +#endif /* ATTRIBS_H */ diff --git a/target/hexagon/attribs_def.h.inc b/target/hexagon/attribs_def.h.inc new file mode 100644 index 0000000000..381550909d --- /dev/null +++ b/target/hexagon/attribs_def.h.inc @@ -0,0 +1,97 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +/* Keep this as the first attribute: */ +DEF_ATTRIB(AA_DUMMY, "Dummy Zeroth Attribute", "", "") + +/* Misc */ +DEF_ATTRIB(EXTENSION, "Extension instruction", "", "") + +DEF_ATTRIB(PRIV, "Not available in user or guest mode", "", "") +DEF_ATTRIB(GUEST, "Not available in user mode", "", "") + +DEF_ATTRIB(FPOP, "Floating Point Operation", "", "") + +DEF_ATTRIB(EXTENDABLE, "Immediate may be extended", "", "") + +DEF_ATTRIB(ARCHV2, "V2 architecture", "", "") +DEF_ATTRIB(ARCHV3, "V3 architecture", "", "") +DEF_ATTRIB(ARCHV4, "V4 architecture", "", "") +DEF_ATTRIB(ARCHV5, "V5 architecture", "", "") + +DEF_ATTRIB(SUBINSN, "sub-instruction", "", "") + +/* Load and Store attributes */ +DEF_ATTRIB(LOAD, "Loads from memory", "", "") +DEF_ATTRIB(STORE, "Stores to memory", "", "") +DEF_ATTRIB(MEMLIKE, "Memory-like instruction", "", "") +DEF_ATTRIB(MEMLIKE_PACKET_RULES, "follows Memory-like packet rules", "", "") + + +/* Change-of-flow attributes */ +DEF_ATTRIB(JUMP, "Jump-type instruction", "", "") +DEF_ATTRIB(INDIRECT, "Absolute register jump", "", "") +DEF_ATTRIB(CALL, "Function call instruction", "", "") +DEF_ATTRIB(COF, "Change-of-flow instruction", "", "") +DEF_ATTRIB(CONDEXEC, "May be cancelled by a predicate", "", "") +DEF_ATTRIB(DOTNEWVALUE, "Uses a register value generated in this pkt", "", "") +DEF_ATTRIB(NEWCMPJUMP, "Compound compare and jump", "", "") + +/* access to implicit registers */ +DEF_ATTRIB(IMPLICIT_WRITES_LR, "Writes the link register", "", "UREG.LR") +DEF_ATTRIB(IMPLICIT_WRITES_SP, "Writes the stack pointer", "", "UREG.SP") +DEF_ATTRIB(IMPLICIT_WRITES_FP, "Writes the frame pointer", "", "UREG.FP") +DEF_ATTRIB(IMPLICIT_WRITES_LC0, "Writes loop count for loop 0", "", "UREG.LC0") +DEF_ATTRIB(IMPLICIT_WRITES_LC1, "Writes loop count for loop 1", "", "UREG.LC1") +DEF_ATTRIB(IMPLICIT_WRITES_SA0, "Writes start addr for loop 0", "", "UREG.SA0") +DEF_ATTRIB(IMPLICIT_WRITES_SA1, "Writes start addr for loop 1", "", "UREG.SA1") +DEF_ATTRIB(IMPLICIT_WRITES_P0, "Writes Predicate 0", "", "UREG.P0") +DEF_ATTRIB(IMPLICIT_WRITES_P1, "Writes Predicate 1", "", "UREG.P1") +DEF_ATTRIB(IMPLICIT_WRITES_P2, "Writes Predicate 1", "", "UREG.P2") +DEF_ATTRIB(IMPLICIT_WRITES_P3, "May write Predicate 3", "", "UREG.P3") +DEF_ATTRIB(IMPLICIT_READS_PC, "Reads the PC register", "", "") +DEF_ATTRIB(WRITES_PRED_REG, "Writes a predicate register", "", "") + +DEF_ATTRIB(CRSLOT23, "Can execute in slot 2 or slot 3 (CR)", "", "") +DEF_ATTRIB(IT_NOP, "nop instruction", "", "") +DEF_ATTRIB(IT_EXTENDER, "constant extender instruction", "", "") + + +/* Restrictions to make note of */ +DEF_ATTRIB(RESTRICT_SLOT0ONLY, "Must execute on slot0", "", "") +DEF_ATTRIB(RESTRICT_SLOT1ONLY, "Must execute on slot1", "", "") +DEF_ATTRIB(RESTRICT_SLOT2ONLY, "Must execute on slot2", "", "") +DEF_ATTRIB(RESTRICT_SLOT3ONLY, "Must execute on slot3", "", "") +DEF_ATTRIB(RESTRICT_NOSLOT1, "No slot 1 instruction in parallel", "", "") +DEF_ATTRIB(RESTRICT_PREFERSLOT0, "Try to encode into slot 0", "", "") + +DEF_ATTRIB(ICOP, "Instruction cache op", "", "") + +DEF_ATTRIB(HWLOOP0_END, "Ends HW loop0", "", "") +DEF_ATTRIB(HWLOOP1_END, "Ends HW loop1", "", "") +DEF_ATTRIB(DCZEROA, "dczeroa type", "", "") +DEF_ATTRIB(ICFLUSHOP, "icflush op type", "", "") +DEF_ATTRIB(DCFLUSHOP, "dcflush op type", "", "") +DEF_ATTRIB(DCFETCH, "dcfetch type", "", "") + +DEF_ATTRIB(L2FETCH, "Instruction is l2fetch type", "", "") + +DEF_ATTRIB(ICINVA, "icinva", "", "") +DEF_ATTRIB(DCCLEANINVA, "dccleaninva", "", "") + +/* Keep this as the last attribute: */ +DEF_ATTRIB(ZZ_LASTATTRIB, "Last attribute in the file", "", "")