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[47.51.160.125]) by smtp.gmail.com with ESMTPSA id c21sm3950355pgh.0.2021.02.17.15.40.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Feb 2021 15:40:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 12/35] Hexagon (target/hexagon) register fields Date: Wed, 17 Feb 2021 15:40:00 -0800 Message-Id: <20210217234023.1742406-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210217234023.1742406-1-richard.henderson@linaro.org> References: <20210217234023.1742406-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Taylor Simpson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Taylor Simpson Declare bitfields within registers such as user status register (USR) Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson Message-Id: <1612763186-18161-12-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson --- target/hexagon/reg_fields.h | 36 +++++++++++++++++++++++++ target/hexagon/reg_fields_def.h.inc | 41 +++++++++++++++++++++++++++++ target/hexagon/reg_fields.c | 27 +++++++++++++++++++ 3 files changed, 104 insertions(+) create mode 100644 target/hexagon/reg_fields.h create mode 100644 target/hexagon/reg_fields_def.h.inc create mode 100644 target/hexagon/reg_fields.c -- 2.25.1 diff --git a/target/hexagon/reg_fields.h b/target/hexagon/reg_fields.h new file mode 100644 index 0000000000..d3c86c942f --- /dev/null +++ b/target/hexagon/reg_fields.h @@ -0,0 +1,36 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef HEXAGON_REG_FIELDS_H +#define HEXAGON_REG_FIELDS_H + +typedef struct { + int offset; + int width; +} RegField; + +extern const RegField reg_field_info[]; + +enum { +#define DEF_REG_FIELD(TAG, START, WIDTH) \ + TAG, +#include "reg_fields_def.h.inc" + NUM_REG_FIELDS +#undef DEF_REG_FIELD +}; + +#endif diff --git a/target/hexagon/reg_fields_def.h.inc b/target/hexagon/reg_fields_def.h.inc new file mode 100644 index 0000000000..f2a58d486c --- /dev/null +++ b/target/hexagon/reg_fields_def.h.inc @@ -0,0 +1,41 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +/* + * For registers that have individual fields, explain them here + * DEF_REG_FIELD(tag, + * bit start offset, + * width + */ + +/* USR fields */ +DEF_REG_FIELD(USR_OVF, 0, 1) +DEF_REG_FIELD(USR_FPINVF, 1, 1) +DEF_REG_FIELD(USR_FPDBZF, 2, 1) +DEF_REG_FIELD(USR_FPOVFF, 3, 1) +DEF_REG_FIELD(USR_FPUNFF, 4, 1) +DEF_REG_FIELD(USR_FPINPF, 5, 1) + +DEF_REG_FIELD(USR_LPCFG, 8, 2) + +DEF_REG_FIELD(USR_FPRND, 22, 2) + +DEF_REG_FIELD(USR_FPINVE, 25, 1) +DEF_REG_FIELD(USR_FPDBZE, 26, 1) +DEF_REG_FIELD(USR_FPOVFE, 27, 1) +DEF_REG_FIELD(USR_FPUNFE, 28, 1) +DEF_REG_FIELD(USR_FPINPE, 29, 1) diff --git a/target/hexagon/reg_fields.c b/target/hexagon/reg_fields.c new file mode 100644 index 0000000000..bdcab79428 --- /dev/null +++ b/target/hexagon/reg_fields.c @@ -0,0 +1,27 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "reg_fields.h" + +const RegField reg_field_info[] = { +#define DEF_REG_FIELD(TAG, START, WIDTH) \ + { START, WIDTH }, +#include "reg_fields_def.h.inc" + { 0, 0 } +#undef DEF_REG_FIELD +};