From patchwork Fri Feb 5 22:56:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 377034 Delivered-To: patch@linaro.org Received: by 2002:a17:906:48d2:0:0:0:0 with SMTP id d18csp2593419ejt; Fri, 5 Feb 2021 15:33:36 -0800 (PST) X-Google-Smtp-Source: ABdhPJxFiaUm/yL1s3O04GZorCA3rkE+13fLzLA0WLUqBn0AeiueTMknuIMFIjjuWZMXewFU3UeA X-Received: by 2002:a25:d683:: with SMTP id n125mr10107622ybg.256.1612568016833; Fri, 05 Feb 2021 15:33:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612568016; cv=none; d=google.com; s=arc-20160816; b=1Eav5EfCYh+Qmrm/uaomHQpDRfDMBUEWhha1S9yuS9ATKFChJukLQHIj90YVG8CDp2 9OiX3pDBKTeD3gZC12TX/jnpZ5cGBsd5vE5JtAbaC6klXaHi2UKHCRcUMM1xHDAMaNq+ cpwZeWQsU1rf9kUtvfNAiakX+ax4CeNs5TV3r+DnKClEyWuhh+ouiH41EvW9BrXnGDK0 Mrxpy5Lo1JKqr/K/9kA1it61CC5tqwD47d6xg8nSzg5JnG8pTDpIPYfpmUjzvxxA0oNn xZJBCgh1GHROhQk/zbvNeeRvTRM0GH4igumbwxQQ0ZLrYJa8bulPGJTGVz1HaViL1DCc ggLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ZpT0a90ks+5DiP5UMdif8NtnBjPr0Hz5e7GTI8mhROE=; b=ZVvGY7ThOpthlYollNGicpJwphk2wL3BbdZSDr61Om1tsa2esZvWyfhsVxYArMk8vC dszJkfwtFYrhZLRd2rEzyDT/nwohanFVHPH2pe0r6S/SUNTuB7vJCFYAGMu1lWKb+Yls gt87jVlJrHJs2tg6Qey6l186ZQw/FrGiedi2dn6wk9CGZR/gz3mjmERS3Ccjq34gvaoN CRCRpvq87gMhIVemHvCi9Eip1H5pSMK2AIsHQEUeaxAJ3AVyne6tvucT/rSjqfrXug2P MQnk1UMt3ZH2KCdLUjzNd/kuRGKPq0tzvbXPTdchzJEOvjRNH9whRPBZIWYxD00MupcG SfbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zhqRtXyg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id e62si10118464ybf.418.2021.02.05.15.33.36 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 05 Feb 2021 15:33:36 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zhqRtXyg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:60322 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l8AbY-0004SE-75 for patch@linaro.org; Fri, 05 Feb 2021 18:33:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59788) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l8A3W-0003Im-VK for qemu-devel@nongnu.org; Fri, 05 Feb 2021 17:58:26 -0500 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]:36598) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l8A3U-0003lX-83 for qemu-devel@nongnu.org; Fri, 05 Feb 2021 17:58:26 -0500 Received: by mail-pj1-x1033.google.com with SMTP id gx20so4657100pjb.1 for ; Fri, 05 Feb 2021 14:58:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZpT0a90ks+5DiP5UMdif8NtnBjPr0Hz5e7GTI8mhROE=; b=zhqRtXygHDduFVHeM9fJqYeV3OdwbVt5Ckjx9axmOIn697tDejuzYkw5t+CHaHZjRl HLkMaXDuhm4nElJvu44wrHVAQvQpUDI/hKCsIW237sQrq3HloMbfUHm2GydZLju4Hebr 1IAB2HGTWG7TAf97YfUGYj49j7Vf0TMc5PsYE+TVHJTImATegBHq++r16MENOIYwMHP+ CGXtXNnoeegriKTTEDvuH8ecnDeyGNdOWbEc+FW/LXCRJSSCJ6E62KgeNeNwWKRURJ2C s4PnBY+JVWLuWMeoG9+LeZEM2WF4jG4Lc6zqXjxPjqkfmzZSiqQs88yvzbO4sxQnCFZu RMFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZpT0a90ks+5DiP5UMdif8NtnBjPr0Hz5e7GTI8mhROE=; b=o26iEzawA6FqfwsfTH+7i271VP2voZ21D4hyRUG1gA1LhmosbieCSXLFfN+ITJaVLL RbIyVi70Sc9tYCfsZ93BrH8u+l/6yPjh/5UBbPFHDRKL02G1T2E5fVapQCc5AdwdAxce iEikG2G9kAiB958lGQR7J1iWripySsgx0bifJLL7pe8ngKnvGFgqYVOqK3YieJoQiyDS MPNKWQGJ1i4P7bPSAHF/b+pEi49g6XNFvhXYbGyv/+OgS30e0ep1YHp/fMqsRuUWrUMW TkXt3ZJxWXVZD8f1XpJ6GwoH40OuHWWBtYcxTVKhkbriCT4Z78KlJ8yQbmpLjkIZgTFb 8C+A== X-Gm-Message-State: AOAM530oqN1DIgJ05R/+cu9NOUlZ3Ggj965evrEB3KXDZfLRn3YN/qxj 87iTD0b1zFmMfHcUbuP3dsIUoSKUNtc0o8iP X-Received: by 2002:a17:90a:d09:: with SMTP id t9mr6526999pja.139.1612565901807; Fri, 05 Feb 2021 14:58:21 -0800 (PST) Received: from localhost.localdomain (cpe-66-27-222-29.hawaii.res.rr.com. [66.27.222.29]) by smtp.gmail.com with ESMTPSA id c23sm12155149pgc.72.2021.02.05.14.58.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Feb 2021 14:58:21 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 46/46] accel: introduce AccelCPUClass extending CPUClass Date: Fri, 5 Feb 2021 12:56:50 -1000 Message-Id: <20210205225650.1330794-47-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210205225650.1330794-1-richard.henderson@linaro.org> References: <20210205225650.1330794-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Claudio Fontana Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Claudio Fontana add a new optional interface to CPUClass, which allows accelerators to extend the CPUClass with additional accelerator-specific initializations. This will allow to separate the target cpu code that is specific to each accelerator, and register it automatically with object hierarchy lookup depending on accelerator code availability, as part of the accel_init_interfaces() initialization step. Signed-off-by: Claudio Fontana Message-Id: <20210204163931.7358-19-cfontana@suse.de> Signed-off-by: Richard Henderson --- include/hw/core/accel-cpu.h | 38 ++++++++++++++++++++++++++++++++ include/hw/core/cpu.h | 4 ++++ accel/accel-common.c | 44 +++++++++++++++++++++++++++++++++++++ MAINTAINERS | 1 + 4 files changed, 87 insertions(+) create mode 100644 include/hw/core/accel-cpu.h -- 2.25.1 diff --git a/include/hw/core/accel-cpu.h b/include/hw/core/accel-cpu.h new file mode 100644 index 0000000000..24a6697412 --- /dev/null +++ b/include/hw/core/accel-cpu.h @@ -0,0 +1,38 @@ +/* + * Accelerator interface, specializes CPUClass + * This header is used only by target-specific code. + * + * Copyright 2021 SUSE LLC + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef ACCEL_CPU_H +#define ACCEL_CPU_H + +/* + * This header is used to define new accelerator-specific target-specific + * accelerator cpu subclasses. + * It uses CPU_RESOLVING_TYPE, so this is clearly target-specific. + * + * Do not try to use for any other purpose than the implementation of new + * subclasses in target/, or the accel implementation itself in accel/ + */ + +#define TYPE_ACCEL_CPU "accel-" CPU_RESOLVING_TYPE +#define ACCEL_CPU_NAME(name) (name "-" TYPE_ACCEL_CPU) +typedef struct AccelCPUClass AccelCPUClass; +DECLARE_CLASS_CHECKERS(AccelCPUClass, ACCEL_CPU, TYPE_ACCEL_CPU) + +typedef struct AccelCPUClass { + /*< private >*/ + ObjectClass parent_class; + /*< public >*/ + + void (*cpu_class_init)(CPUClass *cc); + void (*cpu_instance_init)(CPUState *cpu); + void (*cpu_realizefn)(CPUState *cpu, Error **errp); +} AccelCPUClass; + +#endif /* ACCEL_CPU_H */ diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 4f6c6b18c9..38d813c389 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -79,6 +79,9 @@ struct TranslationBlock; /* see tcg-cpu-ops.h */ struct TCGCPUOps; +/* see accel-cpu.h */ +struct AccelCPUClass; + /** * CPUClass: * @class_by_name: Callback to map -cpu command line model name to an @@ -187,6 +190,7 @@ struct CPUClass { /* Keep non-pointer data at the end to minimize holes. */ int gdb_num_core_regs; bool gdb_stop_before_watchpoint; + struct AccelCPUClass *accel_cpu; /* when TCG is not available, this pointer is NULL */ struct TCGCPUOps *tcg_ops; diff --git a/accel/accel-common.c b/accel/accel-common.c index 6b59873419..9901b0531c 100644 --- a/accel/accel-common.c +++ b/accel/accel-common.c @@ -26,6 +26,9 @@ #include "qemu/osdep.h" #include "qemu/accel.h" +#include "cpu.h" +#include "hw/core/accel-cpu.h" + #ifndef CONFIG_USER_ONLY #include "accel-softmmu.h" #endif /* !CONFIG_USER_ONLY */ @@ -46,16 +49,57 @@ AccelClass *accel_find(const char *opt_name) return ac; } +static void accel_init_cpu_int_aux(ObjectClass *klass, void *opaque) +{ + CPUClass *cc = CPU_CLASS(klass); + AccelCPUClass *accel_cpu = opaque; + + cc->accel_cpu = accel_cpu; + if (accel_cpu->cpu_class_init) { + accel_cpu->cpu_class_init(cc); + } +} + +/* initialize the arch-specific accel CpuClass interfaces */ +static void accel_init_cpu_interfaces(AccelClass *ac) +{ + const char *ac_name; /* AccelClass name */ + char *acc_name; /* AccelCPUClass name */ + ObjectClass *acc; /* AccelCPUClass */ + + ac_name = object_class_get_name(OBJECT_CLASS(ac)); + g_assert(ac_name != NULL); + + acc_name = g_strdup_printf("%s-%s", ac_name, CPU_RESOLVING_TYPE); + acc = object_class_by_name(acc_name); + g_free(acc_name); + + if (acc) { + object_class_foreach(accel_init_cpu_int_aux, + CPU_RESOLVING_TYPE, false, acc); + } +} + void accel_init_interfaces(AccelClass *ac) { #ifndef CONFIG_USER_ONLY accel_init_ops_interfaces(ac); #endif /* !CONFIG_USER_ONLY */ + + accel_init_cpu_interfaces(ac); } +static const TypeInfo accel_cpu_type = { + .name = TYPE_ACCEL_CPU, + .parent = TYPE_OBJECT, + .abstract = true, + .class_size = sizeof(AccelCPUClass), +}; + static void register_accel_types(void) { type_register_static(&accel_type); + type_register_static(&accel_cpu_type); } type_init(register_accel_types); diff --git a/MAINTAINERS b/MAINTAINERS index 2e63561ad0..8d8b0bf966 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -440,6 +440,7 @@ R: Paolo Bonzini S: Maintained F: include/qemu/accel.h F: include/sysemu/accel-ops.h +F: include/hw/core/accel-cpu.h F: accel/accel-*.c F: accel/Makefile.objs F: accel/stubs/Makefile.objs