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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id q132sm3835462pfq.171.2021.02.03.17.46.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Feb 2021 17:46:36 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 47/93] tcg/tci: Split out tci_args_l Date: Wed, 3 Feb 2021 15:44:23 -1000 Message-Id: <20210204014509.882821-48-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210204014509.882821-1-richard.henderson@linaro.org> References: <20210204014509.882821-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/tcg/tci.c b/tcg/tci.c index 86625061f1..8bc9dd27b0 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -184,6 +184,11 @@ static tcg_target_ulong tci_read_label(const uint8_t **tb_ptr) * s = signed ldst offset */ +static void tci_args_l(const uint8_t **tb_ptr, void **l0) +{ + *l0 = (void *)tci_read_label(tb_ptr); +} + static void tci_args_rr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1) { @@ -434,9 +439,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, #endif break; case INDEX_op_br: - label = tci_read_label(&tb_ptr); + tci_args_l(&tb_ptr, &ptr); tci_assert(tb_ptr == old_code_ptr + op_size); - tb_ptr = (uint8_t *)label; + tb_ptr = ptr; continue; case INDEX_op_setcond_i32: tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition);