From patchwork Thu Jan 14 02:16:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 362805 Delivered-To: patch@linaro.org Received: by 2002:a02:ccad:0:0:0:0:0 with SMTP id t13csp71212jap; Wed, 13 Jan 2021 18:28:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJzTf4tXdxDH4oVCRjshglQlE/IYx4EwuAMLnpnH2ZA95U1W4FnloyxSnTsJHy49jT4q9LYY X-Received: by 2002:a25:af0d:: with SMTP id a13mr7971752ybh.453.1610591335950; Wed, 13 Jan 2021 18:28:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610591335; cv=none; d=google.com; s=arc-20160816; b=maaahMwckAH3yGDHUQyNPgFztTPXRdhkxgnKqnNgtns/XBPbQmvbwQmLvdnWl5K5Dq CXMWFjU4Lg/4xZ4b8OIR9IReW2EfX7b1/Qi+3jmXuTY9/Ho1lOsI+HKBZjQPV695VQCm IngPZD+V3Owg/E40GpT6R+/IGDdL/pbPiLSgR8svjHkGnYaKwXkYyvc2KjUQePY9wn4i TzB/WtkKHEd8KAd7RzfteSmrnN4p3+OX1E06giEzTh8Zil+ZjOLk5oJQikG125d54h6V gJ5Ywn1D0CqxUW8IJRL4URudBSr5EtZBRD2pu4MypCs8Q6lq+3E1gVcCHLKhgsvjMzUY 1uCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=mSdOJnq5o42NhYADknuNWjZocBsJJt/CxyEeh2zDN58=; b=NTyHnSQKBKJuHNssVfrkoaeWhZJF5XCmMwUmL6zfFyRfmOBaJTsSGjZ7QZn2wWEDmZ YTSkm1Jj52e8us7o5WCdvh8+mcMDxMXJl08b9LbB7DbjnC0vhY/h7XQkDgRjOkS9Ee4T cxPskj0pLMCwEu1OXf3AfUiX+PdDX6tD6EnhNyKyemA1FTvBQAvFBIXRvtSF8S8FyZ3v h+ydoOxCG9Txh9y52DM4qezbq316q+/PtnuVHiUwFX6mesOtSIhbuyyCZKWMjZeI1eVE W1yEB6Cu2DKTbeldtvDSV14OiSvpMLRaMQvm0xrZ+EsBUPcUZJm+rAlZhoweVn7LwlCk ZbDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Xd/QJUhp"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o13si4133740ybk.139.2021.01.13.18.28.55 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 13 Jan 2021 18:28:55 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Xd/QJUhp"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39848 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kzsNb-0000uz-Ej for patch@linaro.org; Wed, 13 Jan 2021 21:28:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60372) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kzsCc-0003ef-DG for qemu-devel@nongnu.org; Wed, 13 Jan 2021 21:17:34 -0500 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]:35882) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kzsCP-0003TH-5O for qemu-devel@nongnu.org; Wed, 13 Jan 2021 21:17:31 -0500 Received: by mail-pg1-x52c.google.com with SMTP id c132so2752449pga.3 for ; Wed, 13 Jan 2021 18:17:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mSdOJnq5o42NhYADknuNWjZocBsJJt/CxyEeh2zDN58=; b=Xd/QJUhpQJZW/Ni4gTWzHqvrc8CYsDrabctg+7HSgq28PPv8RaTHFIpEnjYpL2yBfe I6NP2utAz5hh4Bhh/FOLfJZLPAufm/CuGgyvTez9ftj+79vNqGVoEXkjl/Z6ORIWncSI IcYuAk/U4mON/J2ctPIDJJoOab26tP4DOA7fvq5TKwGaSgurWEguhkZZXEdcKLCSnJpF 0WVbueH3guqwcMwOw1UpsZ6gxFb2b/Vn4DJ1pIEyb8lFYGdhm6wpcwsY+KAn4dbpglqP LKaL95Eb+OqeWXyiuV5X6H9jsf5sI0hZ4IFPpaDvc3SPvT72zJggkiijeRs98BEItzju PaTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mSdOJnq5o42NhYADknuNWjZocBsJJt/CxyEeh2zDN58=; b=sh0TJi7iW+nD6Q+lzfICzHE18sHxax9wczzdAr2+IZhIpXL+2sWhhLms6EE820/9X9 dt3PnYa5GYvOEUurs5quHh26ffNJHG7rC1WHkICzrzh7KtOqgi/h5f2cko1/Rzcpzm9R g/oa+4g9ziNDxp1I21LfzyVjxtFypzz2B1HMtU36Hd4ZiRFUMcDLUA+X8KbQWc7O84lX xaFnbO9qoLwe1M9fp+Fc1xqlc8gy8SINOUvUj9JmL8mvwX9Gw3VzA2scCA3gkuPRh7Pj l/IBcj+DPeB/GBLZfw9xeeHoaD6IwTsPYlfLGh+agVFLFJQU2X4Mle7Y3vs99xdnh2PT 7SOQ== X-Gm-Message-State: AOAM530JRtb0NDHONHs1ZMX2OsiyKHqjvTFf3/UBrFdMAG6MBHYg3gDf 4LWu4fwiaqeRIlLofFvea2IoFHzHhdCIXQ== X-Received: by 2002:a65:4983:: with SMTP id r3mr5153361pgs.288.1610590638497; Wed, 13 Jan 2021 18:17:18 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id i7sm3771687pfc.50.2021.01.13.18.17.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jan 2021 18:17:17 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 12/24] tcg: Convert tcg_gen_dupi_vec to TCG_CONST Date: Wed, 13 Jan 2021 16:16:42 -1000 Message-Id: <20210114021654.647242-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210114021654.647242-1-richard.henderson@linaro.org> References: <20210114021654.647242-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Because we now store uint64_t in TCGTemp, we can now always store the full 64-bit duplicate immediate. So remove the difference between 32- and 64-bit hosts. Signed-off-by: Richard Henderson --- tcg/optimize.c | 9 ++++----- tcg/tcg-op-vec.c | 39 ++++++++++----------------------------- tcg/tcg.c | 7 +------ 3 files changed, 15 insertions(+), 40 deletions(-) -- 2.25.1 diff --git a/tcg/optimize.c b/tcg/optimize.c index bda727d5ed..dbb03ef96b 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1120,11 +1120,10 @@ void tcg_optimize(TCGContext *s) case INDEX_op_dup2_vec: assert(TCG_TARGET_REG_BITS == 32); if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { - tmp = arg_info(op->args[1])->val; - if (tmp == arg_info(op->args[2])->val) { - tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp); - break; - } + tcg_opt_gen_movi(s, &temps_used, op, op->args[0], + deposit64(arg_info(op->args[1])->val, 32, 32, + arg_info(op->args[2])->val)); + break; } else if (args_are_copies(op->args[1], op->args[2])) { op->opc = INDEX_op_dup_vec; TCGOP_VECE(op) = MO_32; diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c index cdbf11c573..9fbed1366c 100644 --- a/tcg/tcg-op-vec.c +++ b/tcg/tcg-op-vec.c @@ -216,25 +216,17 @@ void tcg_gen_mov_vec(TCGv_vec r, TCGv_vec a) } } -#define MO_REG (TCG_TARGET_REG_BITS == 64 ? MO_64 : MO_32) - -static void do_dupi_vec(TCGv_vec r, unsigned vece, TCGArg a) -{ - TCGTemp *rt = tcgv_vec_temp(r); - vec_gen_2(INDEX_op_dupi_vec, rt->base_type, vece, temp_arg(rt), a); -} - TCGv_vec tcg_const_zeros_vec(TCGType type) { TCGv_vec ret = tcg_temp_new_vec(type); - do_dupi_vec(ret, MO_REG, 0); + tcg_gen_dupi_vec(MO_64, ret, 0); return ret; } TCGv_vec tcg_const_ones_vec(TCGType type) { TCGv_vec ret = tcg_temp_new_vec(type); - do_dupi_vec(ret, MO_REG, -1); + tcg_gen_dupi_vec(MO_64, ret, -1); return ret; } @@ -252,39 +244,28 @@ TCGv_vec tcg_const_ones_vec_matching(TCGv_vec m) void tcg_gen_dup64i_vec(TCGv_vec r, uint64_t a) { - if (TCG_TARGET_REG_BITS == 64) { - do_dupi_vec(r, MO_64, a); - } else if (a == dup_const(MO_32, a)) { - do_dupi_vec(r, MO_32, a); - } else { - TCGv_i64 c = tcg_const_i64(a); - tcg_gen_dup_i64_vec(MO_64, r, c); - tcg_temp_free_i64(c); - } + tcg_gen_dupi_vec(MO_64, r, a); } void tcg_gen_dup32i_vec(TCGv_vec r, uint32_t a) { - do_dupi_vec(r, MO_REG, dup_const(MO_32, a)); + tcg_gen_dupi_vec(MO_32, r, a); } void tcg_gen_dup16i_vec(TCGv_vec r, uint32_t a) { - do_dupi_vec(r, MO_REG, dup_const(MO_16, a)); + tcg_gen_dupi_vec(MO_16, r, a); } void tcg_gen_dup8i_vec(TCGv_vec r, uint32_t a) { - do_dupi_vec(r, MO_REG, dup_const(MO_8, a)); + tcg_gen_dupi_vec(MO_8, r, a); } void tcg_gen_dupi_vec(unsigned vece, TCGv_vec r, uint64_t a) { - if (vece == MO_64) { - tcg_gen_dup64i_vec(r, a); - } else { - do_dupi_vec(r, MO_REG, dup_const(vece, a)); - } + TCGTemp *rt = tcgv_vec_temp(r); + tcg_gen_mov_vec(r, tcg_constant_vec(rt->base_type, vece, a)); } void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec r, TCGv_i64 a) @@ -489,8 +470,8 @@ void tcg_gen_abs_vec(unsigned vece, TCGv_vec r, TCGv_vec a) if (tcg_can_emit_vec_op(INDEX_op_sari_vec, type, vece) > 0) { tcg_gen_sari_vec(vece, t, a, (8 << vece) - 1); } else { - do_dupi_vec(t, MO_REG, 0); - tcg_gen_cmp_vec(TCG_COND_LT, vece, t, a, t); + tcg_gen_cmp_vec(TCG_COND_LT, vece, t, a, + tcg_constant_vec(type, vece, 0)); } tcg_gen_xor_vec(vece, r, a, t); tcg_gen_sub_vec(vece, r, r, t); diff --git a/tcg/tcg.c b/tcg/tcg.c index 802f0b8a32..ad1348d811 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -3539,16 +3539,11 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs, * The targets will, in general, have to do this search anyway, * do this generically. */ - if (TCG_TARGET_REG_BITS == 32) { - val = dup_const(MO_32, val); - vece = MO_32; - } if (val == dup_const(MO_8, val)) { vece = MO_8; } else if (val == dup_const(MO_16, val)) { vece = MO_16; - } else if (TCG_TARGET_REG_BITS == 64 && - val == dup_const(MO_32, val)) { + } else if (val == dup_const(MO_32, val)) { vece = MO_32; }