From patchwork Thu Dec 17 14:52:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 344937 Delivered-To: patch@linaro.org Received: by 2002:a17:906:4755:0:0:0:0 with SMTP id j21csp1289429ejs; Thu, 17 Dec 2020 06:56:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJzPIUm15+QqkPgI9GfVu6aZ5g/KpSGBScoRW9c7OTm5nsomsimSQHFxwyWntZ4O30f2Cq72 X-Received: by 2002:a25:f09:: with SMTP id 9mr59076209ybp.129.1608217000838; Thu, 17 Dec 2020 06:56:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1608217000; cv=none; d=google.com; s=arc-20160816; b=B4tGKWYkodqkvR5cmFRZ2wYDNP0PCkoV5brPb3FVXh/pMdjN3WDdIiJbUt4IpFlZQ1 lL2poinktvPqlFIH3383u7M5SEAE0GO9AdzheamMNmZA5Mgop6+WZiancajfXyzk6oot YT/01w74Av2MqRpeQkIRGpQ1ZQr9G9RzZb7uew7nXb2NwZXNupYQy7lREca1EqkI4MGd QnF5dAFGlZ7OuDVaffVzWrQ3Oll3Cyn0ewChVKjJjIkju40ti2jTLLeizy1kH54BTM4C F2dJgmWmMUfQO4CqxSuZZRMgolCM4g5RK4TgaH9uYn3TpNJkaUOWMV+uu/lLjxAP5Cml fhqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=7smMUJ3GTwe/WfNNy/U+eGwwMqkpocbG1ZOKTJ5WLrw=; b=ewNlVKU+1DjElkIkjDO/EVlpK/QY0j2lyj6AuQMxDZD6MMwo2P7wUcmGYrvZPTtUcn ejhsw18Dxw6Fk3KnU67sjSboDrmGE9NSYYWTbW//n2VClQ+wokv/kRjBJvRECSZEi97d 2M316RL6BgukEw+yzuROSjylRojQj3m1Epe8EbzfPUhYYJWADlRoFhX+XvTTMVBil51i sK0qpS6ZvJBSIoWxhefVsxaMlksDxxaAIR8vEcn3c/iIJhwCx/xo3apaHkCTXv0FQPdu hFK5YQbTKYNlO+bZCFDS5oZEaSrs9om8I9Qt+wldRePaNwsF+ZLUoHEBJzBv1QYs7jV9 kpCw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aihn+utz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h188si4559579ybh.298.2020.12.17.06.56.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 17 Dec 2020 06:56:40 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aihn+utz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56486 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kpuhs-0007Wb-5e for patch@linaro.org; Thu, 17 Dec 2020 09:56:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33372) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kpue4-0003bG-RD for qemu-devel@nongnu.org; Thu, 17 Dec 2020 09:52:44 -0500 Received: from mail-oi1-x230.google.com ([2607:f8b0:4864:20::230]:42572) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kpue0-0004zQ-Qf for qemu-devel@nongnu.org; Thu, 17 Dec 2020 09:52:44 -0500 Received: by mail-oi1-x230.google.com with SMTP id l200so32405956oig.9 for ; Thu, 17 Dec 2020 06:52:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=7smMUJ3GTwe/WfNNy/U+eGwwMqkpocbG1ZOKTJ5WLrw=; b=aihn+utz6fKF5JU3te3+cKyCh6ajzt5ghaeROUMI6UhGmdvtiq1iP+qPXNcFuBk4sE r1HSCZfSwMrwCLSSJ+qHZSu2bzO4uvg8lvjruwrZlJti8eRpSnll3T52YiUNTOUuTHCM D+bUCkFtUDuAIv7dxBkquwn1OG4PKv8R5h/GndiqS6uZOe6eKF6HTQNa6rtBM2Jy/zil 0Zk6fCFggV4N+yBdnyFQXSQ/LZJn8/BKwMt7ZTJlim1xkEetdh80yGiGwkZ05FyWOWgu WwPslwm+K+2J6spcCN2/19IxeW1q6Gl5Y9tRq4ibT3axM8PUyUrGZO9fcRHHqCDpkuYN O30g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7smMUJ3GTwe/WfNNy/U+eGwwMqkpocbG1ZOKTJ5WLrw=; b=GfiiRwTfIb4mmTTbvJn3/LS76Nx5W5I4tmAhbhIR7bVxzvItwiojGPxaf42ss6sbU7 XAsmfJgV+opiOkkMmKbHi+YHTiOLMSP2HRIqYJCf4Gz7IU2JutaM0G/MR6TIk7HqGVbL oya1eddwVH0KqY/Udidhv6qZEannIWgHD8NFTPWh2Qs1++YLlqElDyNr/50S+S1+vc2E z/oW4pTqr7eDh5wYgeNbNFqX0ML3WGAzdcs9YGllIiP8muKBzLd3uUdBEu0+y/0KVVf/ 6fZYmhwfHUzLyTvlUtLMYw7w/fG/b51bdLXPH01HC9eZ4F19G9dRF6mlmloQYBRUZDbv 2TMQ== X-Gm-Message-State: AOAM530rw3+MMCyPbCT9QJl1wErg5a7OnQQOYKvUVGXNtZRvEnQI0sDT wutJ8tklbou9JBiOQHy8ji5T9AiOh5D5qyxr X-Received: by 2002:aca:c1d6:: with SMTP id r205mr5002914oif.37.1608216758795; Thu, 17 Dec 2020 06:52:38 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id x130sm1136342oif.3.2020.12.17.06.52.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Dec 2020 06:52:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 19/23] tcg: Add tcg_reg_alloc_dup2 Date: Thu, 17 Dec 2020 08:52:11 -0600 Message-Id: <20201217145215.534637-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201217145215.534637-1-richard.henderson@linaro.org> References: <20201217145215.534637-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::230; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are several ways we can expand a vector dup of a 64-bit element on a 32-bit host. Signed-off-by: Richard Henderson --- tcg/tcg.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 97 insertions(+) -- 2.25.1 diff --git a/tcg/tcg.c b/tcg/tcg.c index 8def2f99e6..09a82d444f 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -4030,6 +4030,98 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op) } } +static bool tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op) +{ + const TCGLifeData arg_life = op->life; + TCGTemp *ots, *itsl, *itsh; + TCGType vtype = TCGOP_VECL(op) + TCG_TYPE_V64; + + /* This opcode is only valid for 32-bit hosts, for 64-bit elements. */ + tcg_debug_assert(TCG_TARGET_REG_BITS == 32); + tcg_debug_assert(TCGOP_VECE(op) == MO_64); + + ots = arg_temp(op->args[0]); + itsl = arg_temp(op->args[1]); + itsh = arg_temp(op->args[2]); + + /* ENV should not be modified. */ + tcg_debug_assert(!temp_readonly(ots)); + + /* Allocate the output register now. */ + if (ots->val_type != TEMP_VAL_REG) { + TCGRegSet allocated_regs = s->reserved_regs; + TCGRegSet dup_out_regs = + tcg_op_defs[INDEX_op_dup_vec].args_ct[0].regs; + + /* Make sure to not spill the input registers. */ + if (!IS_DEAD_ARG(1) && itsl->val_type == TEMP_VAL_REG) { + tcg_regset_set_reg(allocated_regs, itsl->reg); + } + if (!IS_DEAD_ARG(2) && itsh->val_type == TEMP_VAL_REG) { + tcg_regset_set_reg(allocated_regs, itsh->reg); + } + + ots->reg = tcg_reg_alloc(s, dup_out_regs, allocated_regs, + op->output_pref[0], ots->indirect_base); + ots->val_type = TEMP_VAL_REG; + ots->mem_coherent = 0; + s->reg_to_temp[ots->reg] = ots; + } + + /* Promote dup2 of immediates to dupi_vec. */ + if (itsl->val_type == TEMP_VAL_CONST && itsh->val_type == TEMP_VAL_CONST) { + uint64_t val = deposit64(itsl->val, 32, 32, itsh->val); + MemOp vece = MO_64; + + if (val == dup_const(MO_8, val)) { + vece = MO_8; + } else if (val == dup_const(MO_16, val)) { + vece = MO_16; + } else if (val == dup_const(MO_32, val)) { + vece = MO_32; + } + + tcg_out_dupi_vec(s, vtype, vece, ots->reg, val); + goto done; + } + + /* If the two inputs form one 64-bit value, try dupm_vec. */ + if (itsl + 1 == itsh && itsl->base_type == TCG_TYPE_I64) { + if (!itsl->mem_coherent) { + temp_sync(s, itsl, s->reserved_regs, 0, 0); + } + if (!itsh->mem_coherent) { + temp_sync(s, itsh, s->reserved_regs, 0, 0); + } +#ifdef HOST_WORDS_BIGENDIAN + TCGTemp *its = itsh; +#else + TCGTemp *its = itsl; +#endif + if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg, + its->mem_base->reg, its->mem_offset)) { + goto done; + } + } + + /* Fall back to generic expansion. */ + return false; + + done: + if (IS_DEAD_ARG(1)) { + temp_dead(s, itsl); + } + if (IS_DEAD_ARG(2)) { + temp_dead(s, itsh); + } + if (NEED_SYNC_ARG(0)) { + temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0)); + } else if (IS_DEAD_ARG(0)) { + temp_dead(s, ots); + } + return true; +} + #ifdef TCG_TARGET_STACK_GROWSUP #define STACK_DIR(x) (-(x)) #else @@ -4442,6 +4534,11 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) case INDEX_op_call: tcg_reg_alloc_call(s, op); break; + case INDEX_op_dup2_vec: + if (tcg_reg_alloc_dup2(s, op)) { + break; + } + /* fall through */ default: /* Sanity check that we've not introduced any unhandled opcodes. */ tcg_debug_assert(tcg_op_supported(opc));