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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id i10sm40773pfd.60.2020.11.05.19.30.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 19:30:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 29/41] tcg/sparc: Support split-wx code generation Date: Thu, 5 Nov 2020 19:29:09 -0800 Message-Id: <20201106032921.600200-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201106032921.600200-1-richard.henderson@linaro.org> References: <20201106032921.600200-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: j@getutm.app Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.h | 2 +- tcg/sparc/tcg-target.c.inc | 24 +++++++++++++----------- 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 517840705f..bb2505bfc7 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -181,6 +181,6 @@ static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len) void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t); #define TCG_TARGET_NEED_POOL_LABELS -#define TCG_TARGET_SUPPORT_MIRROR 0 +#define TCG_TARGET_SUPPORT_MIRROR 1 #endif diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc index 8f04fdf981..182124b96c 100644 --- a/tcg/sparc/tcg-target.c.inc +++ b/tcg/sparc/tcg-target.c.inc @@ -291,14 +291,15 @@ static inline int check_fit_i32(int32_t val, unsigned int bits) # define check_fit_ptr check_fit_i32 #endif -static bool patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *src_rw, int type, intptr_t value, intptr_t addend) { - uint32_t insn = *code_ptr; + const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw); + uint32_t insn = *src_rw; intptr_t pcrel; value += addend; - pcrel = tcg_ptr_byte_diff((tcg_insn_unit *)value, code_ptr); + pcrel = tcg_ptr_byte_diff((tcg_insn_unit *)value, src_rx); switch (type) { case R_SPARC_WDISP16: @@ -315,7 +316,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, g_assert_not_reached(); } - *code_ptr = insn; + *src_rw = insn; return true; } @@ -868,8 +869,8 @@ static void tcg_out_mb(TCGContext *s, TCGArg a0) } #ifdef CONFIG_SOFTMMU -static tcg_insn_unit *qemu_ld_trampoline[16]; -static tcg_insn_unit *qemu_st_trampoline[16]; +static const tcg_insn_unit *qemu_ld_trampoline[16]; +static const tcg_insn_unit *qemu_st_trampoline[16]; static void emit_extend(TCGContext *s, TCGReg r, int op) { @@ -930,7 +931,7 @@ static void build_trampolines(TCGContext *s) while ((uintptr_t)s->code_ptr & 15) { tcg_out_nop(s); } - qemu_ld_trampoline[i] = s->code_ptr; + qemu_ld_trampoline[i] = tcg_splitwx_to_rx(s->code_ptr); if (SPARC64 || TARGET_LONG_BITS == 32) { ra = TCG_REG_O3; @@ -958,7 +959,7 @@ static void build_trampolines(TCGContext *s) while ((uintptr_t)s->code_ptr & 15) { tcg_out_nop(s); } - qemu_st_trampoline[i] = s->code_ptr; + qemu_st_trampoline[i] = tcg_splitwx_to_rx(s->code_ptr); if (SPARC64) { emit_extend(s, TCG_REG_O2, i); @@ -1038,7 +1039,8 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out_nop(s); /* Epilogue for goto_ptr. */ - tcg_code_gen_epilogue = s->code_ptr; + /* TODO: Cast goes away when all hosts converted */ + tcg_code_gen_epilogue = (void *)tcg_splitwx_to_rx(s->code_ptr); tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN); /* delay slot */ tcg_out_movi_imm13(s, TCG_REG_O0, 0); @@ -1163,7 +1165,7 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr, #ifdef CONFIG_SOFTMMU unsigned memi = get_mmuidx(oi); TCGReg addrz, param; - tcg_insn_unit *func; + const tcg_insn_unit *func; tcg_insn_unit *label_ptr; addrz = tcg_out_tlb_load(s, addr, memi, memop, @@ -1245,7 +1247,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr, #ifdef CONFIG_SOFTMMU unsigned memi = get_mmuidx(oi); TCGReg addrz, param; - tcg_insn_unit *func; + const tcg_insn_unit *func; tcg_insn_unit *label_ptr; addrz = tcg_out_tlb_load(s, addr, memi, memop,