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[88.18.140.237]) by smtp.gmail.com with ESMTPSA id d20sm5907484edp.85.2020.10.26.16.30.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 16:30:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 5/8] target/sh4: Update coding style to make checkpatch.pl happy Date: Tue, 27 Oct 2020 00:29:32 +0100 Message-Id: <20201026232935.92777-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201026232935.92777-1-f4bug@amsat.org> References: <20201026232935.92777-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-x62f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Magnus Damm , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Yoshinori Sato Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Avoid checkpatch.pl warnings in the next commit. Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/op_helper.c | 8 +++++--- target/sh4/translate.c | 8 +++++--- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index 14c3db0f485..fcd9ac7271c 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -398,9 +398,11 @@ float32 helper_fsrra_FT(CPUSH4State *env, float32 t0) /* "Approximate" 1/sqrt(x) via actual computation. */ t0 = float32_sqrt(t0, &env->fp_status); t0 = float32_div(float32_one, t0, &env->fp_status); - /* Since this is supposed to be an approximation, an imprecision - exception is required. One supposes this also follows the usual - IEEE rule that other exceptions take precidence. */ + /* + * Since this is supposed to be an approximation, an imprecision + * exception is required. One supposes this also follows the usual + * IEEE rule that other exceptions take precidence. + */ if (get_float_exception_flags(&env->fp_status) == 0) { set_float_exception_flags(float_flag_inexact, &env->fp_status); } diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 60c863d9e1b..ec5b04889e1 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -1959,9 +1959,11 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env) NEXT_INSN; switch (ctx->opcode & 0xf00f) { case 0x6003: /* mov Rm,Rn */ - /* Here we want to recognize ld_dst being saved for later consumtion, - or for another input register being copied so that ld_dst need not - be clobbered during the operation. */ + /* + * Here we want to recognize ld_dst being saved for later consumtion, + * or for another input register being copied so that ld_dst need not + * be clobbered during the operation. + */ op_dst = B11_8; mv_src = B7_4; if (op_dst == ld_dst) {