From patchwork Sat Oct 24 17:01:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 270495 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33F6EC2D0A3 for ; Sat, 24 Oct 2020 17:03:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C30DC2085B for ; Sat, 24 Oct 2020 17:03:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bLL2Ia7Q" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C30DC2085B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:56956 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kWMxK-0000fy-LV for qemu-devel@archiver.kernel.org; Sat, 24 Oct 2020 13:03:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60662) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kWMvI-0007N3-0m; Sat, 24 Oct 2020 13:01:44 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:36219) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kWMvG-0005hw-6W; Sat, 24 Oct 2020 13:01:43 -0400 Received: by mail-wr1-x441.google.com with SMTP id x7so6474649wrl.3; Sat, 24 Oct 2020 10:01:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=stOTEgOsHIG6dN4Yvyqzv0io+9AejfdctLjiiWuokYQ=; b=bLL2Ia7Q5Eru2gY7vfC+sRlqvnroLOPWXVQwVaZIhHqK0Ufj6SJdAxpRHKozXvbSPl bmBkZgf+zDgOU48bepIbU7XLuBxuIU0CJUt8AdEn5+tqpGYTb04cDdjW3rlTgSbjGrMb 64HN/KTQnq8Pzhx0UGDTQyapalqRruJTU3j1yZrStUjjUvQU/SdmZWYn+kqXznt3K2rr flPcCmdTMo8e8jIoptXa65n2vTJZ274odM7MZM2pEV8bE/y0ZcqJAqg4WSDJN9wjMzsS 5/K7bzehJBxWQYMSimjlPeX9AbZFdBzbHriLVHxowEanI2M4sfyUSlGC76y3h9qwuAHa 89CA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=stOTEgOsHIG6dN4Yvyqzv0io+9AejfdctLjiiWuokYQ=; b=cKQWEM94FgViXaGkuz4TlGnbD6WAxjlxQ88eufVqBttO6HtbxdtL+ZtOklt4OoHe8m f9nyARkA6B9Is8jEkZSJ0GB5RzE76rWnm5CSgXvtrI3gB3ZLjx/rSmS2HajXKD6GAi4/ J6XoqR0UndbCqPZPehoVAtYaUf//C6+GICLXEpGkv/A2xPsIF77ntBLYwqUXDAhBp3qL xzMj9djQ/uXNfIReOHH+tZrzh+3TshbTVll2TrYeP/hXGMC1ZCZiCcRUHZ0JdObz46JB b7pAwJxAKa+fQGnMB4YfcsEXrTVSuMXWs9os29EKxhi1XJrjEhb60kfF01yPEfqPCNrm tHag== X-Gm-Message-State: AOAM533vnrTUb3NvQKtt4KLt95rxi5xIZi8xa2cvfrsz5BeXrol2R1At ViRdTQoSBQ9WJSJMkxqNN+dufCTNXs4= X-Google-Smtp-Source: ABdhPJwaYVxRpiBnTfPgtPJmvQnnewjIe6P0tdGIqxSoR2+CHgELj1J1TT2U5GfMUPD+6vVtqNiOSg== X-Received: by 2002:adf:e444:: with SMTP id t4mr9110398wrm.58.1603558899933; Sat, 24 Oct 2020 10:01:39 -0700 (PDT) Received: from localhost.localdomain (237.red-88-18-140.staticip.rima-tde.net. [88.18.140.237]) by smtp.gmail.com with ESMTPSA id b190sm11282445wmd.35.2020.10.24.10.01.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Oct 2020 10:01:39 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v4 2/9] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type Date: Sat, 24 Oct 2020 19:01:20 +0200 Message-Id: <20201024170127.3592182-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201024170127.3592182-1-f4bug@amsat.org> References: <20201024170127.3592182-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Luc Michel , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Andrew Baumann , qemu-arm@nongnu.org, Igor Mammedov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Remove usage of TypeInfo::class_data. Instead fill the fields in the corresponding class_init(). So far all children use the same values for almost all fields, but we are going to add the BCM2711/BCM2838 SoC for the raspi4 machine which use different fields. Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/bcm2836.c | 108 ++++++++++++++++++++++------------------------- 1 file changed, 51 insertions(+), 57 deletions(-) diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index e7cc2c930d9..8f921d8e904 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -17,57 +17,31 @@ #include "hw/arm/raspi_platform.h" #include "hw/sysbus.h" -typedef struct BCM283XInfo BCM283XInfo; - typedef struct BCM283XClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ - const BCM283XInfo *info; -} BCM283XClass; - -struct BCM283XInfo { const char *name; const char *cpu_type; hwaddr peri_base; /* Peripheral base address seen by the CPU */ hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */ int clusterid; -}; +} BCM283XClass; #define BCM283X_CLASS(klass) \ OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X) #define BCM283X_GET_CLASS(obj) \ OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X) -static const BCM283XInfo bcm283x_socs[] = { - { - .name = TYPE_BCM2836, - .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"), - .peri_base = 0x3f000000, - .ctrl_base = 0x40000000, - .clusterid = 0xf, - }, -#ifdef TARGET_AARCH64 - { - .name = TYPE_BCM2837, - .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"), - .peri_base = 0x3f000000, - .ctrl_base = 0x40000000, - .clusterid = 0x0, - }, -#endif -}; - static void bcm2836_init(Object *obj) { BCM283XState *s = BCM283X(obj); BCM283XClass *bc = BCM283X_GET_CLASS(obj); - const BCM283XInfo *info = bc->info; int n; for (n = 0; n < BCM283X_NCPUS; n++) { object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, - info->cpu_type); + bc->cpu_type); } object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONTROL); @@ -84,7 +58,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) { BCM283XState *s = BCM283X(dev); BCM283XClass *bc = BCM283X_GET_CLASS(dev); - const BCM283XInfo *info = bc->info; Object *obj; int n; @@ -102,14 +75,14 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) "sd-bus"); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0, - info->peri_base, 1); + bc->peri_base, 1); /* bcm2836 interrupt controller (and mailboxes, etc.) */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->control), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0, qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0)); @@ -118,11 +91,11 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) for (n = 0; n < BCM283X_NCPUS; n++) { /* TODO: this should be converted to a property of ARM_CPU */ - s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n; + s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n; /* set periphbase/CBAR value for CPU-local registers */ if (!object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar", - info->peri_base, errp)) { + bc->peri_base, errp)) { return; } @@ -165,38 +138,59 @@ static Property bcm2836_props[] = { static void bcm283x_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); - BCM283XClass *bc = BCM283X_CLASS(oc); - bc->info = data; - dc->realize = bcm2836_realize; - device_class_set_props(dc, bcm2836_props); /* Reason: Must be wired up in code (see raspi_init() function) */ dc->user_creatable = false; } -static const TypeInfo bcm283x_type_info = { - .name = TYPE_BCM283X, - .parent = TYPE_DEVICE, - .instance_size = sizeof(BCM283XState), - .instance_init = bcm2836_init, - .class_size = sizeof(BCM283XClass), - .abstract = true, +static void bcm2836_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + BCM283XClass *bc = BCM283X_CLASS(oc); + + bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); + bc->peri_base = 0x3f000000; + bc->ctrl_base = 0x40000000; + bc->clusterid = 0xf; + dc->realize = bcm2836_realize; + device_class_set_props(dc, bcm2836_props); }; -static void bcm2836_register_types(void) +#ifdef TARGET_AARCH64 +static void bcm2837_class_init(ObjectClass *oc, void *data) { - int i; + DeviceClass *dc = DEVICE_CLASS(oc); + BCM283XClass *bc = BCM283X_CLASS(oc); - type_register_static(&bcm283x_type_info); - for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) { - TypeInfo ti = { - .name = bcm283x_socs[i].name, - .parent = TYPE_BCM283X, - .class_init = bcm283x_class_init, - .class_data = (void *) &bcm283x_socs[i], - }; - type_register(&ti); + bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"); + bc->peri_base = 0x3f000000; + bc->ctrl_base = 0x40000000; + bc->clusterid = 0x0; + dc->realize = bcm2836_realize; + device_class_set_props(dc, bcm2836_props); +}; +#endif + +static const TypeInfo bcm283x_types[] = { + { + .name = TYPE_BCM2836, + .parent = TYPE_BCM283X, + .class_init = bcm2836_class_init, +#ifdef TARGET_AARCH64 + }, { + .name = TYPE_BCM2837, + .parent = TYPE_BCM283X, + .class_init = bcm2837_class_init, +#endif + }, { + .name = TYPE_BCM283X, + .parent = TYPE_DEVICE, + .instance_size = sizeof(BCM283XState), + .instance_init = bcm2836_init, + .class_size = sizeof(BCM283XClass), + .class_init = bcm283x_class_init, + .abstract = true, } -} +}; -type_init(bcm2836_register_types) +DEFINE_TYPES(bcm283x_types)