From patchwork Wed Oct 21 17:37:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 302359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA01CC388F9 for ; Wed, 21 Oct 2020 17:46:28 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1B4C4223BF for ; Wed, 21 Oct 2020 17:46:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ZjszGXpN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1B4C4223BF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:52672 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVIBu-0005Tn-VM for qemu-devel@archiver.kernel.org; Wed, 21 Oct 2020 13:46:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51754) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVI3n-0006VF-Kl for qemu-devel@nongnu.org; Wed, 21 Oct 2020 13:38:10 -0400 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:46875) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kVI3j-0006S9-25 for qemu-devel@nongnu.org; Wed, 21 Oct 2020 13:38:03 -0400 Received: by mail-pg1-x541.google.com with SMTP id n16so1867217pgv.13 for ; Wed, 21 Oct 2020 10:37:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sWSDVti4WQsQ83LDBJmh30WxQyxLm/+WzGhuvboKIIc=; b=ZjszGXpNFNzbFKUOQ/LOH2B3z/Ag3KvkxSYvzo01c5isyUVY7hNy5lDZ64X0nkFfmt ww9FmLsnX1XCXTnwvfvZBY011ilU9UNEAE8UNIo3c/97EEd8KfblKvpd4w/dGac1MsLg odoywAGPEmw14P8ebKHnNH6oiL5NFt3EChbkycnkAeLzho85owjXyZJjlWCIUhly5arm jxUbzcsfL15n5O/XW0uvJYS+ZzbpcVH/25UPG958Ph1Nfl52kUR9EM5OjgKGdVkgxHnU 0wbAI2nX9OWLp7kG6s5xvMo2U0TUx0S5d9ZB5p3OpVThgpI8RDh5jZYjLirgc/Cyxlbu sQvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sWSDVti4WQsQ83LDBJmh30WxQyxLm/+WzGhuvboKIIc=; b=MDlSVL77FFxGVG2WXHqauMF3HP5feTihr1hPe2Pz721egyKK9//Z26d9Jtq0UDjGtK sRjCYbB3EInSTS4EPkwRHPxzApVbb4oakGuhD+VY4doMpyOOEO+gXBC04qsP/zkbUfhJ VdULt0N8GJAljQ1aM7V1TURqblla0X95AUddnfRR/7gsX9Yg2uKBwyRfqWdo2cD7dpe2 vLtJwrIezEHSK7A4vVUAlBN99wAsvWxGqfTAml1BZdljmYCRKjaAtjG5LU0jtMJnxWi/ 7UAqpmH+Ulk71rsPkZFmsl8yOquoIaAH3w8u0PoXmbapNKj9kh52rkGpRYmkRe+AZPQC YCIg== X-Gm-Message-State: AOAM531Ot7Z8mNzdNsI3cIyGssJF6ELVRZI0n5LjvOPSJ/zGdYo3kO8M rnqBnrHF9uaFI+mMbilsCeRrAjTZBbbgCw== X-Google-Smtp-Source: ABdhPJxDizNjRvt897DDtioUj+goRcTTHivZ1X4WRLysBrv8hnoxA15jOgw53sMXGowZrV/L9w+uCA== X-Received: by 2002:aa7:9059:0:b029:151:d725:e230 with SMTP id n25-20020aa790590000b0290151d725e230mr4624501pfo.77.1603301874462; Wed, 21 Oct 2020 10:37:54 -0700 (PDT) Received: from localhost.localdomain ([71.212.141.89]) by smtp.gmail.com with ESMTPSA id h5sm2928829pfh.9.2020.10.21.10.37.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Oct 2020 10:37:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v12 02/12] linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTI Date: Wed, 21 Oct 2020 10:37:39 -0700 Message-Id: <20201021173749.111103-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201021173749.111103-1-richard.henderson@linaro.org> References: <20201021173749.111103-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::541; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x541.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Transform the prot bit to a qemu internal page bit, and save it in the page tables. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v10: Add PAGE_BTI define (pmm). --- include/exec/cpu-all.h | 2 ++ linux-user/syscall_defs.h | 4 ++++ target/arm/cpu.h | 5 +++++ linux-user/mmap.c | 16 ++++++++++++++++ target/arm/translate-a64.c | 6 +++--- 5 files changed, 30 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 61e13b5038..656a2a8788 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -274,6 +274,8 @@ extern intptr_t qemu_host_page_mask; /* FIXME: Code that sets/uses this is broken and needs to go away. */ #define PAGE_RESERVED 0x0020 #endif +/* Target-specific bits that will be used via page_get_flags(). */ +#define PAGE_TARGET_1 0x0080 #if defined(CONFIG_USER_ONLY) void page_dump(FILE *f); diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 731c3d5341..cabbfb762d 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -1277,6 +1277,10 @@ struct target_winsize { #define TARGET_PROT_SEM 0x08 #endif +#ifdef TARGET_AARCH64 +#define TARGET_PROT_BTI 0x10 +#endif + /* Common */ #define TARGET_MAP_SHARED 0x01 /* Share changes */ #define TARGET_MAP_PRIVATE 0x02 /* Changes are private */ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 49cd5cabcf..c18a916766 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3445,6 +3445,11 @@ static inline MemTxAttrs *typecheck_memtxattrs(MemTxAttrs *x) #define arm_tlb_bti_gp(x) (typecheck_memtxattrs(x)->target_tlb_bit0) #define arm_tlb_mte_tagged(x) (typecheck_memtxattrs(x)->target_tlb_bit1) +/* + * AArch64 usage of the PAGE_TARGET_* bits for linux-user. + */ +#define PAGE_BTI PAGE_TARGET_1 + /* * Naming convention for isar_feature functions: * Functions which test 32-bit ID registers should have _aa32_ in diff --git a/linux-user/mmap.c b/linux-user/mmap.c index f261563420..00c05e6a0f 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -83,6 +83,22 @@ static int validate_prot_to_pageflags(int *host_prot, int prot) *host_prot = (prot & (PROT_READ | PROT_WRITE)) | (prot & PROT_EXEC ? PROT_READ : 0); +#ifdef TARGET_AARCH64 + /* + * The PROT_BTI bit is only accepted if the cpu supports the feature. + * Since this is the unusual case, don't bother checking unless + * the bit has been requested. If set and valid, record the bit + * within QEMU's page_flags. + */ + if (prot & TARGET_PROT_BTI) { + ARMCPU *cpu = ARM_CPU(thread_cpu); + if (cpu_isar_feature(aa64_bti, cpu)) { + valid |= TARGET_PROT_BTI; + page_flags |= PAGE_BTI; + } + } +#endif + return prot & ~valid ? 0 : page_flags; } diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 7188808341..072754fa24 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -14507,10 +14507,10 @@ static void disas_data_proc_simd_fp(DisasContext *s, uint32_t insn) */ static bool is_guarded_page(CPUARMState *env, DisasContext *s) { -#ifdef CONFIG_USER_ONLY - return false; /* FIXME */ -#else uint64_t addr = s->base.pc_first; +#ifdef CONFIG_USER_ONLY + return page_get_flags(addr) & PAGE_BTI; +#else int mmu_idx = arm_to_core_mmu_idx(s->mmu_idx); unsigned int index = tlb_index(env, mmu_idx, addr); CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr);