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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id w11sm25209231wrs.26.2020.10.12.10.10.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Oct 2020 10:10:13 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 5/6] hw/pci-host/sabre: Report IOMMU address range as unimplemented Date: Mon, 12 Oct 2020 19:09:49 +0200 Message-Id: <20201012170950.3491912-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012170950.3491912-1-f4bug@amsat.org> References: <20201012170950.3491912-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/sabre.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 4412e23131c..67699ac9058 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -122,6 +122,7 @@ static void sabre_config_write(void *opaque, hwaddr addr, switch (addr) { case 0x30 ... 0x4f: /* DMA error registers */ + case 0x200 ... 0x21f: /* IOMMU registers */ qemu_log_mask(LOG_UNIMP, "%s: Register 0x%02" HWADDR_PRIX " not implemented\n", __func__, addr); @@ -201,6 +202,7 @@ static uint64_t sabre_config_read(void *opaque, switch (addr) { case 0x30 ... 0x4f: /* DMA error registers */ + case 0x200 ... 0x21f: /* IOMMU registers */ qemu_log_mask(LOG_UNIMP, "%s: Register 0x%02" HWADDR_PRIX " not implemented\n", __func__, addr);