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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id b5sm3359947wrs.97.2020.10.12.10.10.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Oct 2020 10:10:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 4/6] hw/pci-host/sabre: Report unimplemented accesses via UNIMP log_mask Date: Mon, 12 Oct 2020 19:09:48 +0200 Message-Id: <20201012170950.3491912-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012170950.3491912-1-f4bug@amsat.org> References: <20201012170950.3491912-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Report unimplemented register accesses using qemu_log_mask(UNIMP). Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/sabre.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 3645bc962cb..4412e23131c 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -121,8 +121,10 @@ static void sabre_config_write(void *opaque, hwaddr addr, trace_sabre_config_write(addr, val); switch (addr) { - case 0x30 ... 0x4f: /* DMA error registers */ - /* XXX: not implemented yet */ + case 0x30 ... 0x4f: /* DMA error registers */ + qemu_log_mask(LOG_UNIMP, + "%s: Register 0x%02" HWADDR_PRIX " not implemented\n", + __func__, addr); break; case 0xc00 ... 0xc3f: /* PCI interrupt control */ if (addr & 4) { @@ -198,8 +200,10 @@ static uint64_t sabre_config_read(void *opaque, uint32_t val = 0; switch (addr) { - case 0x30 ... 0x4f: /* DMA error registers */ - /* XXX: not implemented yet */ + case 0x30 ... 0x4f: /* DMA error registers */ + qemu_log_mask(LOG_UNIMP, + "%s: Register 0x%02" HWADDR_PRIX " not implemented\n", + __func__, addr); break; case 0xc00 ... 0xc3f: /* PCI interrupt control */ if (addr & 4) {