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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id n2sm21770729wrt.82.2020.10.11.12.33.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 12:33:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 06/10] hw/isa: Add the ISA_IRQ_PAR_DEFAULT definition Date: Sun, 11 Oct 2020 21:32:25 +0200 Message-Id: <20201011193229.3210774-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201011193229.3210774-1-f4bug@amsat.org> References: <20201011193229.3210774-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x341.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S. Tsirkin" , Jason Wang , Mark Cave-Ayland , qemu-block@nongnu.org, Stefan Berger , qemu-trivial@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Artyom Tarasenko , Laurent Vivier , Thomas Huth , Eduardo Habkost , Corey Minyard , Paolo Bonzini , John Snow , Richard Henderson , Kevin Wolf , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Max Reitz , qemu-ppc@nongnu.org, Igor Mammedov , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The parallel port uses IRQ #7 by default. Add this default definition to the IsaIrqNumber enum. Avoid magic values in the code, replace them by the newly introduced definition. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/isa.h | 1 + hw/char/parallel.c | 2 +- hw/sparc64/sun4u.c | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 214a6730598..081fa446152 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -13,6 +13,7 @@ enum IsaIrqNumber { ISA_IRQ_SER_DEFAULT = 4, ISA_IRQ_TPM_DEFAULT = 5, ISA_IRQ_FDC_DEFAULT = 6, + ISA_IRQ_PAR_DEFAULT = 7, ISA_NUM_IRQS = 16 }; diff --git a/hw/char/parallel.c b/hw/char/parallel.c index 8b418abf719..9e0d80ec0d0 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -636,7 +636,7 @@ bool parallel_mm_init(MemoryRegion *address_space, static Property parallel_isa_properties[] = { DEFINE_PROP_UINT32("index", ISAParallelState, index, -1), DEFINE_PROP_UINT32("iobase", ISAParallelState, iobase, -1), - DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7), + DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, ISA_IRQ_PAR_DEFAULT), DEFINE_PROP_CHR("chardev", ISAParallelState, state.chr), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 458dc215e6f..c5b3e838ac2 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -611,7 +611,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem, pci_realize_and_unref(ebus, pci_busA, &error_fatal); /* Wire up "well-known" ISA IRQs to PBM legacy obio IRQs */ - qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 7, + qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", ISA_IRQ_PAR_DEFAULT, qdev_get_gpio_in_named(DEVICE(sabre), "pbm-irq", OBIO_LPT_IRQ)); qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", ISA_IRQ_FDC_DEFAULT, qdev_get_gpio_in_named(DEVICE(sabre), "pbm-irq", OBIO_FDD_IRQ));