| Message ID | 20201010172617.3079633-19-f4bug@amsat.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | hw/mips: Set CPU frequency | expand |
On 10/10/20 7:26 PM, Philippe Mathieu-Daudé wrote: > The CoreLV card with ID 0x420's CPU clocked at 320 MHz. Create > a 'cpuclk' output clock and connect it to the CPU input clock. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/mips/malta.c | 20 +++++++++++++++++--- > 1 file changed, 17 insertions(+), 3 deletions(-) > > diff --git a/hw/mips/malta.c b/hw/mips/malta.c > index 4019c9dc1a8..c1e8fceeea7 100644 > --- a/hw/mips/malta.c > +++ b/hw/mips/malta.c > @@ -57,6 +57,7 @@ > #include "sysemu/kvm.h" > #include "hw/semihosting/semihost.h" > #include "hw/mips/cps.h" > +#include "hw/qdev-clock.h" > > #define ENVP_ADDR 0x80002000l > #define ENVP_NB_ENTRIES 16 > @@ -94,6 +95,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(MaltaState, MIPS_MALTA) > struct MaltaState { > SysBusDevice parent_obj; > > + Clock *cpuclk; > MIPSCPSState cps; > qemu_irq i8259[ISA_NUM_IRQS]; > }; > @@ -1159,7 +1161,7 @@ static void main_cpu_reset(void *opaque) > } > } > > -static void create_cpu_without_cps(MachineState *ms, > +static void create_cpu_without_cps(MachineState *ms, MaltaState *s, > qemu_irq *cbus_irq, qemu_irq *i8259_irq) > { > CPUMIPSState *env; > @@ -1167,7 +1169,9 @@ static void create_cpu_without_cps(MachineState *ms, > int i; > > for (i = 0; i < ms->smp.cpus; i++) { > - cpu = MIPS_CPU(cpu_create(ms->cpu_type)); > + cpu = MIPS_CPU(object_new(ms->cpu_type)); > + qdev_connect_clock_in(DEVICE(cpu), "clk", s->cpuclk); I forgot to rename this "clk-in" :( > + qdev_realize(DEVICE(cpu), NULL, &error_abort); > > /* Init internal devices */ > cpu_mips_irq_init_cpu(cpu); > @@ -1189,6 +1193,7 @@ static void create_cps(MachineState *ms, MaltaState *s, > &error_fatal); > object_property_set_int(OBJECT(&s->cps), "num-vp", ms->smp.cpus, > &error_fatal); > + qdev_connect_clock_in(DEVICE(&s->cps), "clk", s->cpuclk); > sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal); > > sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); > @@ -1203,7 +1208,7 @@ static void mips_create_cpu(MachineState *ms, MaltaState *s, > if ((ms->smp.cpus > 1) && cpu_supports_cps_smp(ms->cpu_type)) { > create_cps(ms, s, cbus_irq, i8259_irq); > } else { > - create_cpu_without_cps(ms, cbus_irq, i8259_irq); > + create_cpu_without_cps(ms, s, cbus_irq, i8259_irq); > } > } > > @@ -1421,10 +1426,19 @@ void mips_malta_init(MachineState *machine) > pci_vga_init(pci_bus); > } > > +static void mips_malta_instance_init(Object *obj) > +{ > + MaltaState *s = MIPS_MALTA(obj); > + > + s->cpuclk = qdev_init_clock_out(DEVICE(obj), "cpuclk-out"); > + clock_set_hz(s->cpuclk, 320000000); /* 320 MHz */ > +} > + > static const TypeInfo mips_malta_device = { > .name = TYPE_MIPS_MALTA, > .parent = TYPE_SYS_BUS_DEVICE, > .instance_size = sizeof(MaltaState), > + .instance_init = mips_malta_instance_init, > }; > > static void mips_malta_machine_init(MachineClass *mc) >
diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 4019c9dc1a8..c1e8fceeea7 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -57,6 +57,7 @@ #include "sysemu/kvm.h" #include "hw/semihosting/semihost.h" #include "hw/mips/cps.h" +#include "hw/qdev-clock.h" #define ENVP_ADDR 0x80002000l #define ENVP_NB_ENTRIES 16 @@ -94,6 +95,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(MaltaState, MIPS_MALTA) struct MaltaState { SysBusDevice parent_obj; + Clock *cpuclk; MIPSCPSState cps; qemu_irq i8259[ISA_NUM_IRQS]; }; @@ -1159,7 +1161,7 @@ static void main_cpu_reset(void *opaque) } } -static void create_cpu_without_cps(MachineState *ms, +static void create_cpu_without_cps(MachineState *ms, MaltaState *s, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { CPUMIPSState *env; @@ -1167,7 +1169,9 @@ static void create_cpu_without_cps(MachineState *ms, int i; for (i = 0; i < ms->smp.cpus; i++) { - cpu = MIPS_CPU(cpu_create(ms->cpu_type)); + cpu = MIPS_CPU(object_new(ms->cpu_type)); + qdev_connect_clock_in(DEVICE(cpu), "clk", s->cpuclk); + qdev_realize(DEVICE(cpu), NULL, &error_abort); /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); @@ -1189,6 +1193,7 @@ static void create_cps(MachineState *ms, MaltaState *s, &error_fatal); object_property_set_int(OBJECT(&s->cps), "num-vp", ms->smp.cpus, &error_fatal); + qdev_connect_clock_in(DEVICE(&s->cps), "clk", s->cpuclk); sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); @@ -1203,7 +1208,7 @@ static void mips_create_cpu(MachineState *ms, MaltaState *s, if ((ms->smp.cpus > 1) && cpu_supports_cps_smp(ms->cpu_type)) { create_cps(ms, s, cbus_irq, i8259_irq); } else { - create_cpu_without_cps(ms, cbus_irq, i8259_irq); + create_cpu_without_cps(ms, s, cbus_irq, i8259_irq); } } @@ -1421,10 +1426,19 @@ void mips_malta_init(MachineState *machine) pci_vga_init(pci_bus); } +static void mips_malta_instance_init(Object *obj) +{ + MaltaState *s = MIPS_MALTA(obj); + + s->cpuclk = qdev_init_clock_out(DEVICE(obj), "cpuclk-out"); + clock_set_hz(s->cpuclk, 320000000); /* 320 MHz */ +} + static const TypeInfo mips_malta_device = { .name = TYPE_MIPS_MALTA, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(MaltaState), + .instance_init = mips_malta_instance_init, }; static void mips_malta_machine_init(MachineClass *mc)
The CoreLV card with ID 0x420's CPU clocked at 320 MHz. Create a 'cpuclk' output clock and connect it to the CPU input clock. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/mips/malta.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-)