diff mbox series

[V2,09/14] sh4/: fix some comment spelling errors

Message ID 20201009064449.2336-10-zhaolichang@huawei.com
State Superseded
Headers show
Series fix some comment spelling errors | expand

Commit Message

Lichang Zhao Oct. 9, 2020, 6:44 a.m. UTC 
I found that there are many spelling errors in the comments of qemu/target/sh4.
I used spellcheck to check the spelling errors and found some errors in the folder.

Signed-off-by: zhaolichang <zhaolichang@huawei.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
Reviewed-by: Philippe Mathieu-Daude<f4bug@amsat.org>
---
 target/sh4/cpu.h       | 2 +-
 target/sh4/op_helper.c | 2 +-
 target/sh4/translate.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

Comments

Philippe Mathieu-Daudé Oct. 25, 2020, 12:37 a.m. UTC | #1 
On 10/9/20 8:44 AM, zhaolichang wrote:
> I found that there are many spelling errors in the comments of qemu/target/sh4.
> I used spellcheck to check the spelling errors and found some errors in the folder.
> 
> Signed-off-by: zhaolichang <zhaolichang@huawei.com>
> Reviewed-by: David Edmondson <david.edmondson@oracle.com>
> Reviewed-by: Philippe Mathieu-Daude<f4bug@amsat.org>
> ---
>   target/sh4/cpu.h       | 2 +-
>   target/sh4/op_helper.c | 2 +-
>   target/sh4/translate.c | 2 +-
>   3 files changed, 3 insertions(+), 3 deletions(-)

Thanks, applied to renesas-next.
diff mbox series

Patch

diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index dbe58c7888..91fa9498f0 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -160,7 +160,7 @@  typedef struct CPUSH4State {
     uint32_t pteh;		/* page table entry high register */
     uint32_t ptel;		/* page table entry low register */
     uint32_t ptea;		/* page table entry assistance register */
-    uint32_t ttb;		/* tranlation table base register */
+    uint32_t ttb;		/* translation table base register */
     uint32_t tea;		/* TLB exception address register */
     uint32_t tra;		/* TRAPA exception register */
     uint32_t expevt;		/* exception event register */
diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c
index 14c3db0f48..9de4152735 100644
--- a/target/sh4/op_helper.c
+++ b/target/sh4/op_helper.c
@@ -400,7 +400,7 @@  float32 helper_fsrra_FT(CPUSH4State *env, float32 t0)
     t0 = float32_div(float32_one, t0, &env->fp_status);
     /* Since this is supposed to be an approximation, an imprecision
        exception is required.  One supposes this also follows the usual
-       IEEE rule that other exceptions take precidence.  */
+       IEEE rule that other exceptions take precedence.  */
     if (get_float_exception_flags(&env->fp_status) == 0) {
         set_float_exception_flags(float_flag_inexact, &env->fp_status);
     }
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 60c863d9e1..c57218eb7d 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -1959,7 +1959,7 @@  static void decode_gusa(DisasContext *ctx, CPUSH4State *env)
     NEXT_INSN;
     switch (ctx->opcode & 0xf00f) {
     case 0x6003: /* mov Rm,Rn */
-        /* Here we want to recognize ld_dst being saved for later consumtion,
+        /* Here we want to recognize ld_dst being saved for later consumption,
            or for another input register being copied so that ld_dst need not
            be clobbered during the operation.  */
         op_dst = B11_8;