| Message ID | 20201008162155.161886-4-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/arm: MTE fixes | expand |
On 10/8/20 5:21 PM, Richard Henderson wrote: > Unlike many other bits in HCR_EL2, the description for this > bit does not contain the phrase "if ... this field behaves > as 0 for all purposes other than", so do not squash the bit > in arm_hcr_el2_eff. > > Instead, replicate the E2H+TGE test in the two places that > require it. > > Reported-by: Vincenzo Frascino <vincenzo.frascino@arm.com> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Tested-by: Vincenzo Frascino <vincenzo.frascino@arm.com> > --- > target/arm/internals.h | 9 +++++---- > target/arm/helper.c | 9 +++++---- > 2 files changed, 10 insertions(+), 8 deletions(-) > > diff --git a/target/arm/internals.h b/target/arm/internals.h > index ae99725d2b..5460678756 100644 > --- a/target/arm/internals.h > +++ b/target/arm/internals.h > @@ -1252,10 +1252,11 @@ static inline bool allocation_tag_access_enabled(CPUARMState *env, int el, > && !(env->cp15.scr_el3 & SCR_ATA)) { > return false; > } > - if (el < 2 > - && arm_feature(env, ARM_FEATURE_EL2) > - && !(arm_hcr_el2_eff(env) & HCR_ATA)) { > - return false; > + if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) { > + uint64_t hcr = arm_hcr_el2_eff(env); > + if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { > + return false; > + } > } > sctlr &= (el == 0 ? SCTLR_ATA0 : SCTLR_ATA); > return sctlr != 0; > diff --git a/target/arm/helper.c b/target/arm/helper.c > index cd0779ff5f..0620572e44 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -6874,10 +6874,11 @@ static CPAccessResult access_mte(CPUARMState *env, const ARMCPRegInfo *ri, > { > int el = arm_current_el(env); > > - if (el < 2 && > - arm_feature(env, ARM_FEATURE_EL2) && > - !(arm_hcr_el2_eff(env) & HCR_ATA)) { > - return CP_ACCESS_TRAP_EL2; > + if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) { > + uint64_t hcr = arm_hcr_el2_eff(env); > + if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { > + return CP_ACCESS_TRAP_EL2; > + } > } > if (el < 3 && > arm_feature(env, ARM_FEATURE_EL3) && >
diff --git a/target/arm/internals.h b/target/arm/internals.h index ae99725d2b..5460678756 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1252,10 +1252,11 @@ static inline bool allocation_tag_access_enabled(CPUARMState *env, int el, && !(env->cp15.scr_el3 & SCR_ATA)) { return false; } - if (el < 2 - && arm_feature(env, ARM_FEATURE_EL2) - && !(arm_hcr_el2_eff(env) & HCR_ATA)) { - return false; + if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) { + uint64_t hcr = arm_hcr_el2_eff(env); + if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { + return false; + } } sctlr &= (el == 0 ? SCTLR_ATA0 : SCTLR_ATA); return sctlr != 0; diff --git a/target/arm/helper.c b/target/arm/helper.c index cd0779ff5f..0620572e44 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6874,10 +6874,11 @@ static CPAccessResult access_mte(CPUARMState *env, const ARMCPRegInfo *ri, { int el = arm_current_el(env); - if (el < 2 && - arm_feature(env, ARM_FEATURE_EL2) && - !(arm_hcr_el2_eff(env) & HCR_ATA)) { - return CP_ACCESS_TRAP_EL2; + if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) { + uint64_t hcr = arm_hcr_el2_eff(env); + if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { + return CP_ACCESS_TRAP_EL2; + } } if (el < 3 && arm_feature(env, ARM_FEATURE_EL3) &&
Unlike many other bits in HCR_EL2, the description for this bit does not contain the phrase "if ... this field behaves as 0 for all purposes other than", so do not squash the bit in arm_hcr_el2_eff. Instead, replicate the E2H+TGE test in the two places that require it. Reported-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/internals.h | 9 +++++---- target/arm/helper.c | 9 +++++---- 2 files changed, 10 insertions(+), 8 deletions(-)