From patchwork Mon Oct 5 19:56:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Luc Michel X-Patchwork-Id: 303659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA323C4363A for ; Mon, 5 Oct 2020 20:23:56 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3B73F20853 for ; Mon, 5 Oct 2020 20:23:56 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Mon, 05 Oct 2020 15:55:45 -0400 Received: from sekoia-pc.home.lmichel.fr (sekoia-pc.home.lmichel.fr [192.168.61.100]) by pharaoh.lmichel.fr (Postfix) with ESMTPS id 006A1C60F1B; Mon, 5 Oct 2020 19:55:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=lmichel.fr; s=pharaoh; t=1601927720; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sXZbbcIcfJa9fmuyQ/jkFubTz3/tLARdyvfrI2boCtg=; b=NSIREmTxom20lxgcpeVoX620QlQ+XM9XQnrLwl0sdMgU5dQOIYwd3QfInbt+Wv11H2VNjX r4OkHA/a9ZVi/QlmpCeptTF9iMyZEMoPqSV96mY5UcWeX8USz4cFX2SAX0mmUUjCWJZfi3 sTfrvXnDMROEnkBFPXtW9SX6IgKosRcMKYUjExA2q+MXhIJxIBpEfWp0lufCWnSh5lDwtq TUQu28CyjPYGCE/JESCKTxqtsGvS0NZ3D5uzSfTmTQU8EAj5xB7EhQYH8l/JFHSAnyou78 vE3T7Df5zf+ren8ROQjDXpoP1qa/S26/cy1xG2Fj8cUJ2Ix4e8sBsfEQGrqdlQ== From: Luc Michel To: qemu-devel@nongnu.org Subject: [PATCH v2 11/15] hw/misc/bcm2835_cprman: implement clock mux behaviour Date: Mon, 5 Oct 2020 21:56:08 +0200 Message-Id: <20201005195612.1999165-12-luc@lmichel.fr> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201005195612.1999165-1-luc@lmichel.fr> References: <20201005195612.1999165-1-luc@lmichel.fr> MIME-Version: 1.0 ARC-Message-Signature: i=1; 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pharaoh.lmichel.fr Received-SPF: pass client-ip=149.202.28.74; envelope-from=luc@lmichel.fr; helo=pharaoh.lmichel.fr X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/05 15:49:50 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Luc Michel , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Andrew Baumann , Paul Zimmerman , Niek Linnenbank , qemu-arm@nongnu.org, Havard Skinnemoen Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" A clock mux can be configured to select one of its 10 sources through the CM_CTL register. It also embeds yet another clock divider, composed of an integer part and a fractional part. The number of bits of each part is mux dependent. Tested-by: Philippe Mathieu-Daudé Signed-off-by: Luc Michel --- hw/misc/bcm2835_cprman.c | 44 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 43 insertions(+), 1 deletion(-) diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c index a470ce2026..7d59423367 100644 --- a/hw/misc/bcm2835_cprman.c +++ b/hw/misc/bcm2835_cprman.c @@ -229,19 +229,61 @@ static const TypeInfo cprman_pll_channel_info = { }; /* clock mux */ +static bool clock_mux_is_enabled(CprmanClockMuxState *mux) +{ + return FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, ENABLE); +} + static void clock_mux_update(CprmanClockMuxState *mux) { - clock_update(mux->out, 0); + uint64_t freq; + uint32_t div, src = FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, SRC); + bool enabled = clock_mux_is_enabled(mux); + + *mux->reg_cm = FIELD_DP32(*mux->reg_cm, CM_CLOCKx_CTL, BUSY, enabled); + + if (!enabled) { + clock_update(mux->out, 0); + return; + } + + freq = clock_get_hz(mux->srcs[src]); + + if (mux->int_bits == 0 && mux->frac_bits == 0) { + clock_update_hz(mux->out, freq); + return; + } + + /* + * The divider has an integer and a fractional part. The size of each part + * varies with the muxes (int_bits and frac_bits). Both parts are + * concatenated, with the integer part always starting at bit 12. + */ + div = mux->reg_cm[1] >> (R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits); + div &= (1 << (mux->int_bits + mux->frac_bits)) - 1; + + if (!div) { + clock_update(mux->out, 0); + } + + freq = muldiv64(freq, 1 << mux->frac_bits, div); + + clock_update_hz(mux->out, freq); } static void clock_mux_src_update(void *opaque) { CprmanClockMuxState **backref = opaque; CprmanClockMuxState *s = *backref; + CprmanClockMuxSource src = backref - s->backref; + + if (FIELD_EX32(*s->reg_cm, CM_CLOCKx_CTL, SRC) != src) { + return; + } clock_mux_update(s); } static void clock_mux_init(Object *obj)