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Wed, 30 Sep 2020 14:56:09 +0000 (UTC) Received: from t480s.redhat.com (ovpn-113-220.ams2.redhat.com [10.36.113.220]) by smtp.corp.redhat.com (Postfix) with ESMTP id E1F445C1C4; Wed, 30 Sep 2020 14:56:07 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Subject: [PATCH v1 16/20] s390x/tcg: Implement 32/128bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) Date: Wed, 30 Sep 2020 16:55:19 +0200 Message-Id: <20200930145523.71087-17-david@redhat.com> In-Reply-To: <20200930145523.71087-1-david@redhat.com> References: <20200930145523.71087-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=david@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=david@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/30 00:31:59 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.469, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 6 ++ target/s390x/translate_vx.c.inc | 48 +++++++++++++--- target/s390x/vec_fpu_helper.c | 98 ++++++++++++++++++++------------- 3 files changed, 107 insertions(+), 45 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index c2ded83669..e4d60299dc 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -317,10 +317,16 @@ DEF_HELPER_FLAGS_5(gvec_vfm32s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfm64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfm128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_6(gvec_vfma32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_6(gvec_vfma32s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfma64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_6(gvec_vfma128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_6(gvec_vfms32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_6(gvec_vfms32s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfms64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_6(gvec_vfms128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vfsq32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vfsq32s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc index 6bd599b319..5d31498cc1 100644 --- a/target/s390x/translate_vx.c.inc +++ b/target/s390x/translate_vx.c.inc @@ -2847,18 +2847,52 @@ static DisasJumpType op_vfma(DisasContext *s, DisasOps *o) const uint8_t m5 = get_field(s, m5); const uint8_t fpf = get_field(s, m6); const bool se = extract32(m5, 3, 1); - gen_helper_gvec_4_ptr *fn; + gen_helper_gvec_4_ptr *fn = NULL; - if (fpf != FPF_LONG || extract32(m5, 0, 3)) { + switch (s->fields.op2) { + case 0x8f: + switch (fpf) { + case FPF_SHORT: + if (s390_has_feat(S390_FEAT_VECTOR_ENH)) { + fn = se ? gen_helper_gvec_vfma32s : gen_helper_gvec_vfma32; + } + break; + case FPF_LONG: + fn = se ? gen_helper_gvec_vfma64s : gen_helper_gvec_vfma64; + break; + default: + if (s390_has_feat(S390_FEAT_VECTOR_ENH)) { + fn = gen_helper_gvec_vfma128; + } + break; + } + break; + case 0x8e: + switch (fpf) { + case FPF_SHORT: + if (s390_has_feat(S390_FEAT_VECTOR_ENH)) { + fn = se ? gen_helper_gvec_vfms32s : gen_helper_gvec_vfms32; + } + break; + case FPF_LONG: + fn = se ? gen_helper_gvec_vfms64s : gen_helper_gvec_vfms64; + break; + default: + if (s390_has_feat(S390_FEAT_VECTOR_ENH)) { + fn = gen_helper_gvec_vfms128; + } + break; + } + break; + default: + g_assert_not_reached(); + } + + if (!fn || extract32(m5, 0, 3)) { gen_program_exception(s, PGM_SPECIFICATION); return DISAS_NORETURN; } - if (s->fields.op2 == 0x8f) { - fn = se ? gen_helper_gvec_vfma64s : gen_helper_gvec_vfma64; - } else { - fn = se ? gen_helper_gvec_vfms64s : gen_helper_gvec_vfms64; - } gen_gvec_4_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3), get_field(s, v4), cpu_env, 0, fn); diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c index f18f0ae8e2..0b25718365 100644 --- a/target/s390x/vec_fpu_helper.c +++ b/target/s390x/vec_fpu_helper.c @@ -699,53 +699,75 @@ void HELPER(gvec_vfm##BITS##s)(void *v1, const void *v2, const void *v3, \ DEF_GVEC_FVM_S(32) DEF_GVEC_FVM_S(64) -static void vfma64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3, - const S390Vector *v4, CPUS390XState *env, bool s, int flags, - uintptr_t retaddr) -{ - uint8_t vxc, vec_exc = 0; - S390Vector tmp = {}; - int i; - - for (i = 0; i < 2; i++) { - const uint64_t a = s390_vec_read_element64(v2, i); - const uint64_t b = s390_vec_read_element64(v3, i); - const uint64_t c = s390_vec_read_element64(v4, i); - uint64_t ret = float64_muladd(a, b, c, flags, &env->fpu_status); - - s390_vec_write_element64(&tmp, i, ret); - vxc = check_ieee_exc(env, i, false, &vec_exc); - if (s || vxc) { - break; - } - } - handle_ieee_exc(env, vxc, vec_exc, retaddr); - *v1 = tmp; +#define DEF_VFMA(BITS) \ +static void vfma##BITS(S390Vector *v1, const S390Vector *v2, \ + const S390Vector *v3, const S390Vector *v4, \ + CPUS390XState *env, bool s, int flags, \ + uintptr_t retaddr) \ +{ \ + uint8_t vxc, vec_exc = 0; \ + S390Vector tmp = {}; \ + int i; \ + \ + for (i = 0; i < (128 / BITS); i++) { \ + const float##BITS a = s390_vec_read_float##BITS(v2, i); \ + const float##BITS b = s390_vec_read_float##BITS(v3, i); \ + const float##BITS c = s390_vec_read_float##BITS(v4, i); \ + float##BITS ret = float##BITS##_muladd(a, b, c, flags, \ + &env->fpu_status); \ + \ + s390_vec_write_float##BITS(&tmp, i, ret); \ + vxc = check_ieee_exc(env, i, false, &vec_exc); \ + if (s || vxc) { \ + break; \ + } \ + } \ + handle_ieee_exc(env, vxc, vec_exc, retaddr); \ + *v1 = tmp; \ } +DEF_VFMA(32) +DEF_VFMA(64) +DEF_VFMA(128) -void HELPER(gvec_vfma64)(void *v1, const void *v2, const void *v3, - const void *v4, CPUS390XState *env, uint32_t desc) -{ - vfma64(v1, v2, v3, v4, env, false, 0, GETPC()); +#define DEF_GVEC_VFMA(BITS) \ +void HELPER(gvec_vfma##BITS)(void *v1, const void *v2, const void *v3, \ + const void *v4, CPUS390XState *env, uint32_t desc)\ +{ \ + vfma##BITS(v1, v2, v3, v4, env, false, 0, GETPC()); \ } +DEF_GVEC_VFMA(32) +DEF_GVEC_VFMA(64) +DEF_GVEC_VFMA(128) -void HELPER(gvec_vfma64s)(void *v1, const void *v2, const void *v3, - const void *v4, CPUS390XState *env, uint32_t desc) -{ - vfma64(v1, v2, v3, v4, env, true, 0, GETPC()); +#define DEF_GVEC_VFMA_S(BITS) \ +void HELPER(gvec_vfma##BITS##s)(void *v1, const void *v2, const void *v3, \ + const void *v4, CPUS390XState *env, \ + uint32_t desc) \ +{ \ + vfma##BITS(v1, v2, v3, v4, env, true, 0, GETPC()); \ } +DEF_GVEC_VFMA_S(32) +DEF_GVEC_VFMA_S(64) -void HELPER(gvec_vfms64)(void *v1, const void *v2, const void *v3, - const void *v4, CPUS390XState *env, uint32_t desc) -{ - vfma64(v1, v2, v3, v4, env, false, float_muladd_negate_c, GETPC()); +#define DEF_GVEC_VFMS(BITS) \ +void HELPER(gvec_vfms##BITS)(void *v1, const void *v2, const void *v3, \ + const void *v4, CPUS390XState *env, uint32_t desc)\ +{ \ + vfma##BITS(v1, v2, v3, v4, env, false, float_muladd_negate_c, GETPC()); \ } +DEF_GVEC_VFMS(32) +DEF_GVEC_VFMS(64) +DEF_GVEC_VFMS(128) -void HELPER(gvec_vfms64s)(void *v1, const void *v2, const void *v3, - const void *v4, CPUS390XState *env, uint32_t desc) -{ - vfma64(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC()); +#define DEF_GVEC_VFMS_S(BITS) \ +void HELPER(gvec_vfms##BITS##s)(void *v1, const void *v2, const void *v3, \ + const void *v4, CPUS390XState *env, \ + uint32_t desc) \ +{ \ + vfma##BITS(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC()); \ } +DEF_GVEC_VFMS_S(32) +DEF_GVEC_VFMS_S(64) #define DEF_GVEC_VFSQ(BITS) \ void HELPER(gvec_vfsq##BITS)(void *v1, const void *v2, CPUS390XState *env, \