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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) -- 2.25.1 diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 819ee25cff..36a90e7ef3 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -3508,7 +3508,7 @@ static void expand_vec_rotv(TCGType type, unsigned vece, TCGv_vec v0, static void expand_vec_mul(TCGType type, unsigned vece, TCGv_vec v0, TCGv_vec v1, TCGv_vec v2) { - TCGv_vec t1, t2, t3, t4; + TCGv_vec t1, t2, t3, t4, zero; tcg_debug_assert(vece == MO_8); @@ -3526,11 +3526,11 @@ static void expand_vec_mul(TCGType type, unsigned vece, case TCG_TYPE_V64: t1 = tcg_temp_new_vec(TCG_TYPE_V128); t2 = tcg_temp_new_vec(TCG_TYPE_V128); - tcg_gen_dup16i_vec(t2, 0); + zero = tcg_constant_vec(TCG_TYPE_V128, MO_8, 0); vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8, - tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t2)); + tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(zero)); vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8, - tcgv_vec_arg(t2), tcgv_vec_arg(t2), tcgv_vec_arg(v2)); + tcgv_vec_arg(t2), tcgv_vec_arg(zero), tcgv_vec_arg(v2)); tcg_gen_mul_vec(MO_16, t1, t1, t2); tcg_gen_shri_vec(MO_16, t1, t1, 8); vec_gen_3(INDEX_op_x86_packus_vec, TCG_TYPE_V128, MO_8, @@ -3545,15 +3545,15 @@ static void expand_vec_mul(TCGType type, unsigned vece, t2 = tcg_temp_new_vec(type); t3 = tcg_temp_new_vec(type); t4 = tcg_temp_new_vec(type); - tcg_gen_dup16i_vec(t4, 0); + zero = tcg_constant_vec(TCG_TYPE_V128, MO_8, 0); vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8, - tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t4)); + tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(zero)); vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8, - tcgv_vec_arg(t2), tcgv_vec_arg(t4), tcgv_vec_arg(v2)); + tcgv_vec_arg(t2), tcgv_vec_arg(zero), tcgv_vec_arg(v2)); vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8, - tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(t4)); + tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(zero)); vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8, - tcgv_vec_arg(t4), tcgv_vec_arg(t4), tcgv_vec_arg(v2)); + tcgv_vec_arg(t4), tcgv_vec_arg(zero), tcgv_vec_arg(v2)); tcg_gen_mul_vec(MO_16, t1, t1, t2); tcg_gen_mul_vec(MO_16, t3, t3, t4); tcg_gen_shri_vec(MO_16, t1, t1, 8); @@ -3581,7 +3581,7 @@ static bool expand_vec_cmp_noinv(TCGType type, unsigned vece, TCGv_vec v0, NEED_UMIN = 8, NEED_UMAX = 16, }; - TCGv_vec t1, t2; + TCGv_vec t1, t2, t3; uint8_t fixup; switch (cond) { @@ -3652,9 +3652,9 @@ static bool expand_vec_cmp_noinv(TCGType type, unsigned vece, TCGv_vec v0, } else if (fixup & NEED_BIAS) { t1 = tcg_temp_new_vec(type); t2 = tcg_temp_new_vec(type); - tcg_gen_dupi_vec(vece, t2, 1ull << ((8 << vece) - 1)); - tcg_gen_sub_vec(vece, t1, v1, t2); - tcg_gen_sub_vec(vece, t2, v2, t2); + t3 = tcg_constant_vec(type, vece, 1ull << ((8 << vece) - 1)); + tcg_gen_sub_vec(vece, t1, v1, t3); + tcg_gen_sub_vec(vece, t2, v2, t3); v1 = t1; v2 = t2; cond = tcg_signed_cond(cond);